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Process for fabrication of semiconductors utilizing selectively etchable diffusion sources in combination with melt-flow techniques

机译:利用可选择性蚀刻的扩散源结合熔体流动技术制造半导体的方法

摘要

A process for fabrication of semiconductor devices comprising the steps of depositing over the surface of a semiconductor wafer a first insulating layer containing impurities which are to be diffused into the wafer so as to form source and drain regions, depositing a second insulating and melt-flow layer which is softened or melted at low temperatures, opening contact windows, forming a third insulating layer which also contains impurities to be diffused into the wafer so as to form source drain regions, subjecting the wafer to a heat treatment so as to cause melt-flow and form source and drain regions by the diffusion and removing the third insulating layer. LSI circuits with a high source- drain breakdown voltage may be fabricated at high yields.
机译:一种用于制造半导体器件的方法,包括以下步骤:在半导体晶片的表面上沉积包含要扩散到晶片中的杂质的第一绝缘层,以形成源极区和漏极区;沉积第二绝缘层并进行熔体流动。在低温下软化或熔化的绝缘层,打开接触窗,形成第三绝缘层,该绝缘层也包含要扩散到晶片中的杂质,从而形成源漏区,对晶片进行热处理,以使熔化-通过扩散和去除第三绝缘层来流动并形成源极和漏极区域。具有高源极-漏极击穿电压的LSI电路可以以高成品率来制造。

著录项

  • 公开/公告号US4204894A

    专利类型

  • 公开/公告日1980-05-27

    原文格式PDF

  • 申请/专利权人 MATSUSHITA ELECTRIC INDUSTRIAL CO LTD;

    申请/专利号US19790035236

  • 发明设计人 TADAO KOMEDA;KAZUFUMI OGAWA;

    申请日1979-05-02

  • 分类号H01L21/225;H01L21/316;

  • 国家 US

  • 入库时间 2022-08-22 17:04:30

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