METHOD FOR ERASING MEMORY CELLS IN A FLASH MEMORY DEVICE USING A POSITIVE WELL BIAS VOLTAGE AND A NEGATIVE WORD LINE VOLTAGE

• 1. 快闪存储器件及其字线电压生成方法 [P] . 中国专利： CN102446553B . 2016.12.14
• 2. 快闪存储器件及其字线电压生成方法 [P] . 中国专利： CN102446553A . 2012-05-09
• 3. METHOD FOR ERASING MEMORY CELLS IN A FLASH MEMORY DEVICE USING A POSITIVE WELL BIAS VOLTAGE AND A NEGATIVE WORD LINE VOLTAGE [P] . 美国专利： US2020090757A1 . 2020-03-19

  机译： 使用正阱偏置电压和负字线电压擦除闪存器件中存储单元的方法

• 4. Method for erasing memory cells in a flash memory device using a positive well bias voltage and a negative word line voltage [P] . 美国专利： US10468109B2 . 2019-11-05

  机译： 使用正阱偏置电压和负字线电压擦除闪存设备中的存储单元的方法

• 5. METHOD FOR ERASING MEMORY CELLS IN A FLASH MEMORY DEVICE USING A POSITIVE WELL BIAS VOLTAGE AND A NEGATIVE WORD LINE VOLTAGE [P] . 美国专利： US2016141040A1 . 2016-05-19

  机译： 使用正阱偏置电压和负字线电压擦除闪存器件中存储单元的方法

• 1. Low-Programmable-Voltage Nonvolatile Memory Devices Based on Omega-shaped Gate Organic Ferroelectric P(VDF-TrFE) Field Effect Transistors Using p-type Silicon Nanowire Channels [J] . Ngoc Huynh Van, Jae-Hyun Lee, Dongmok Whang, 纳微快报：英文版 . 2015,第001期
• 2. Characterization of (100)-orientated diamond film grown by HFCVD method with a positive DC bias voltage [J] . MA Ying, WANG Lin-jun, LIU Jian-min, 中国有色金属学报（英文版） . 2006,第0z1期
• 3. Structural Design of an Electrically Erasable EEPROM Memory Cell [J] . Lei Zhao 世界工程和技术（英文） . 2020,第002期
• 4. Application of a negative sweep voltage to control gate of fresh flash memory devices to facilitate threshold voltage test measurement [C] . Cha, C.L., Chor, . 1998
• 5. Hot-carrier effects in flash erasable programmable read-only memory devices. [D] . San, Kemal Tamer. 1994
• 6. Memory bias for negative emotional words in recognition memory is driven by effects of category membership [O] . Corey N. White, Aycan Kapucu, Davide Bruno, -1
• 7. Edge Profile Effect of Tunnel Oxide on Erase Threshold-Voltage Distributions in Flash Memory Cells [O] . Bomsoo Kim, Wook-hyun Kwon, Chang-ki Baek, 2013

• 1. Low-Programmable-Voltage Nonvolatile Memory Devices Based on Omega-shaped Gate Organic Ferroelectric P(VDF-TrFE) Field Effect Transistors Using p-type Silicon Nanowire Channels [J] . Ngoc Huynh Van ,Jae-Hyun Lee ,Dongmok Whang . 安徽地质 . 2015,第001期
• 2. Improved Evaluation Method for the SRAM Cell Write Margin by Word Line Voltage Acceleration [J] . Hiroshi Makino ,Naoya Okada ,Tetsuya Matsumura . 电路与系统（英文） . 2012,第3期
• 3. 基于喹喔啉单元染料敏化剂:给体对电池器件开路电压的影响 [C] . 杨家保 ,武文俊 ,花建丽 . 第一届新型太阳能电池暨钙钛矿太阳能电池学术研讨会 . 2014
• 4. FLASH存储器字线电压发生器优化设计 [A] . 宋国建 . 2009