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Fan out package-on-package with adhesive die attach

机译:扇出package-on-package胶模附加

摘要

Fan Out Package-On-Package (PoP) assemblies in which a second chip is adhered to a non-active side of a first chip. An active side of the first chip embedded in a first package material may be electrically coupled through one or more redistribution layers that fan out to package interconnects on a first side of the POP. A second chip may be adhered, with a second package material, to the non-active side of the first chip. An active side of the second chip may be electrically coupled to the package interconnects through a via structure extending through the first package material. Second interconnects between the second chip, or a package thereof, may contact the via structure. Use of the second package material as an adhesive may improve positional stability of the second chip to facilitate wafer-level assembly techniques.
机译:

著录项

  • 公开/公告号US11380616B2

    专利类型

  • 公开/公告日2022-07-05

    原文格式PDF

  • 申请/专利权人 INTEL IP CORPORATION;

    申请/专利号US201815981830

  • 申请日2018-05-16

  • 分类号H01L23/522;H01L23/538;H01L23/28;H01L23;H01L25;H01L25/065;

  • 国家

  • 入库时间 2023-06-25 23:58:05

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