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首页> 外文会议>1st International Conference on Semiconductor Technology Vol.1, May 27-30, 2001, Shanghai, China >HIGH-K GATE DIELECTRIC DEPOSITION BY ELECTRON CYCLOTRON RESONANCE SPUTTERING
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HIGH-K GATE DIELECTRIC DEPOSITION BY ELECTRON CYCLOTRON RESONANCE SPUTTERING

机译：电子回旋共振溅射高K栅介电沉积

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摘要

A sputtering method using electron cyclotron resonance plasma (ECR sputtering) has been applied to deposit high-k gate dielectrics. Al_2O_3 and ZrO_2 were deposited using metal targets (Al and Zr) and Ar/O_2 gases. A remarkably smooth surface was observed for an ultrathin dielectric by atomic force microscopy. A unique two-step deposition method was used in order to suppress interlayer formation between the dielectrics and Si substrates. Small hysteresis less than several tens of mV were observed for 1.5-20-nm-thick Al_2O_3 films and 3-20-nm-thick ZrO_2 films in high-frequency C-V measurements with Al/dielectrics/p-Si MOS diodes. Small gate leakage currents below 0.1 mA/cm~2 at a gate bias voltage of 3 V were observed for a 3-nm-thick Al_2O_3 film and a 5-nm-thick ZrO_2 film. Dielectric constants of 7.8 and 25 were determined for the Al_2O_3 films and the ZrO_2 films, respectively, based on relations between physical thicknesses and equivalent oxide thicknesses.
机译：已经使用使用电子回旋共振等离子体的溅射方法（ECR溅射）来沉积高k栅极电介质。使用金属靶（Al和Zr）和Ar / O_2气体沉积Al_2O_3和ZrO_2。通过原子力显微镜观察到超薄电介质的表面非常光滑。为了抑制电介质和硅衬底之间的中间层形成，使用了独特的两步沉积方法。在使用Al /电介质/ p-Si MOS二极管进行高频C-V测量时，对于1.5-20 nm厚的Al_2O_3膜和3-20 nm厚的ZrO_2膜，观察到的磁滞小于几十mV。对于3nm厚的Al_2O_3膜和5nm厚的ZrO_2膜，在3V的栅极偏置电压下观察到低于0.1mA / cm〜2的小栅极泄漏电流。根据物理厚度和等效氧化物厚度之间的关系，分别确定了Al_2O_3膜和ZrO_2膜的介电常数7.8和25。

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