3D Simulation of Triple-Gate MOSFETs

机译：三栅极MOSFET的3D模拟

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In this paper we present a new approach of analyzing 3D structure for Triple-Gate MOSFETs with three different mesh regions, one at the top and two in the sidewalls of the fin, which allows the consideration of different carrier mobility at each region due to the crystalline orientation and technological processing. A procedure for the extraction of the mobility parameters in each region is developed. Validation of the proposed structure was made for a FinFET arrays with fixed channel length and different fin widths, obtaining a very good coincidence between experimental and simulated characteristics.

机译：在本文中，我们提出了一种新的分析三栅极MOSFET的3D结构的新方法，该MOSFET具有三个不同的网格区域，一个在顶部，另一个在鳍的侧壁中，两个网格区域考虑了由于结晶取向和工艺加工。开发了用于提取每个区域中的迁移率参数的过程。对于具有固定沟道长度和不同鳍宽度的FinFET阵列，对提出的结构进行了验证，从而在实验和仿真特性之间获得了很好的一致性。

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《2010 27th International Conference on Microelectronics Proceedings》|2010年|p.409-411|共3页
会议地点 Nis(RS);Nis(RS)
作者
Conde J.; Cerdeira A.; Pavanello M.; Kilchytska V.; Flandre D.;
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SecciÃÂ³n de ElectrÃÂ³nica del Estado SÃÂ³lido, Departamento de IngenierÃÂa ElÃÂ©ctrica, CINVESTAV-IPN, Av. IPN 2508, Ado. Postal 14-740, MÃÂ©xico;

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专利

1. 3D simulation of triple-gate MOSFETs with different mobility regions [J] . J. Conde, A. Cerdeira, M. Pavanello, Microelectronic Engineering . 2011,第7期

机译：具有不同迁移率区域的三栅极MOSFET的3D模拟
2. SHORT CHANNEL, FLOATING BODY, AND 3D COUPLING EFFECTS IN TRIPLE-GATE MOSFET [J] . KYOUNG-IL NA, JUNG-HEE LEE, SORIN CRISTOLOVEANU, International Journal of High Speed Electronics and Systems: Devices, Integrated Circuits and Systems, Optical and Quantum Electronics . 2008,第4期

机译：三栅极MOSFET中的短通道，浮置体和3D耦合效应
3. Continuous and symmetric trans-capacitance compact model for triple-gate junctionless MOSFETs [J] . Oproglidis T. A., Tsormpatzoglou A., Tassis D. H., Solid-State Electronics . 2021,第Jana期

机译：用于三栅极连接MOSFET的连续和对称跨电容紧凑型模型
4. 3D Simulation of Triple-Gate MOSFETs [C] . J. Conde, A. Cerdeira, M. Pavanello, International Conference on Microelectronics . 2010

机译：三门MOSFET的3D仿真
5. Non-planar 3D iii-v mosfets for high-speed low-power logic applications [D] . Gu, Jiangjiang 2013

机译：适用于高速低功耗逻辑应用的非平面3D iii-v MOSFET
6. 3D Numerical Simulation of a Z Gate Layout MOSFET for Radiation Tolerance [O] . Ying Wang, Chan Shan, Wei Piao, 2018

机译：Z栅极布局MOSFET的3D数值模拟
7. Impact of Hot Carrier Aging on the Performance of Triple-Gate Junctionless MOSFETs [O] . Theodoros A. Oproglidis, Theano A. Karatsori, Christoforos G. Theodorou, 2020

机译：热载体老化对三栅交叉MOSFET性能的影响
8. Random Dopant Threshold Voltage Fluctuations in 50 nm Epitaxial Channel MOSFETs: A 3D 'Atomoc' Simulation Study [R] . Asenov, Asen 2000

机译：50 nm外延通道mOsFET中的随机掺杂阈值电压波动：3D'原子'模拟研究

3D Simulation of Triple-Gate MOSFETs

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