Low-power design towards implantable neural signal processor- energy efficiency analysis for near-threshold voltage circuits design

机译：面向植入式神经信号处理器的低功耗设计-接近阈值电压电路设计的能效分析

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In this paper, we review state-of-the-art low-voltage fault-tolerable logic techniques that are promising for medical implants. The paper also proposes a method to get the efficiency comparasion of computationnal time delay, power consumption, enrgy efficiency and progress variation of logic gates such as static, transmission gate, DCVSL, dynamic and pesudo in different temperature, time and variations so that the researchers can have a design reference for ultra low-power digital blocks of the implantable systems.

机译：在本文中，我们回顾了最有前景的低压低压容错逻辑技术，这些技术有望用于医疗植入物。本文还提出了一种方法来获取计算时间延迟，功耗，能量效率和逻辑门（如静态，传输门，DCVSL，动态和伪）在不同温度，时间和变化下的效率变化的效率比较，以便研究人员可以为可植入系统的超低功耗数字模块提供设计参考。

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来源
《4th International Symposium on Bioelectronics and Bioinformatics》|2015年|196-199|共4页
会议地点 Beijing(CN)
作者
Wey I-Chyn; Huang Jia-Feng; Gong Cihun-Siyong Alex; Li Shiang-Wei; Lin Chang-Chieh; Chien Chih-Yun; Luo Yu-Fan; Kuo Yu-Hung; Chang Meng-Jung; Hsu Chin-Chih;
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Department of Electrical Engineering, Graduate Institute of Electrical Engineering, School of Electrical and Computer Engineering, College of Engineering, Chang Gung University;

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1. Low-Power Near-Threshold Design: Techniques to Improve Energy Efficiency Energy-efficient near-threshold design has been proposed to increase energy efficiency across a wid [J] . Pinckney Nathaniel, Blaauw David, Sylvester Dennis Solid-State Circuits Magazine, IEEE . 2015,第2期

机译：低功耗近阈值设计：提高能源效率的技术已提出节能近阈值设计来提高整个工厂的能源效率
2. Design of Low-Voltage, Low-Power FGMOS Based Voltage Buffer, Analog Inverter and Winner-Take-All Analog Signal Processing Circuits [J] . Akanksha Ninawe, Richa Srivastava, Akanksha Dewaker, Circuits and Systems . 2016,第1期

机译：基于低压，低功耗FGMOS的电压缓冲器，模拟反相器和双赢的模拟信号处理电路的设计
3. Design of Low-Voltage, Low-Power FGMOS Based Voltage Buffer, Analog Inverter and Winner-Take-All Analog Signal Processing Circuits [J] . Akanksha Ninawe, Richa Srivastava, Akanksha Dewaker, Circuits and systems . 2016,第1期

机译：基于低压，低功率FGMOS的电压缓冲器，模拟反相器和胜者通的模拟信号处理电路的设计
4. Low-power design towards implantable neural signal processor- energy efficiency analysis for near-threshold voltage circuits design [C] . Wey I-Chyn, Huang Jia-Feng, Gong Cihun-Siyong Alex, International Symposium on Bioelectronics and Bioinformatics . 2015

机译：近阈值电路电路设计的植入神经信号处理器 - 能效分析的低功耗设计
5. Low-voltage low-power analog integrated circuit analysis, design and modeling. [D] . Xu, Gonggui. 1999

机译：低压低功耗模拟集成电路的分析，设计和建模。
6. A Preferential Design Approach for Energy-Efficient and Robust Implantable Neural Signal Processing Hardware [O] . Seetharam Narasimhan, Hillel J. Chiel, Swarup Bhunia -1

机译：节能耐用的可植入神经信号处理硬件的优先设计方法
7. Design of Low-Voltage, Low-Power FGMOS Based Voltage Buffer, Analog Inverter and Winner-Take-All Analog Signal Processing Circuits [O] . Akanksha Ninawe, Richa Srivastava, Akanksha Dewaker, 2016

机译：基于低压，低功耗FGMOS的电压缓冲器，模拟变频器和获奖者的设计的设计

Low-power design towards implantable neural signal processor- energy efficiency analysis for near-threshold voltage circuits design

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