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首页> 外文会议>Conference on Poly-Silicon Thin Film Transistor Technology and Applications in Displays and Other Novel Technogoy Areas Jan 21-22, 2003 Santa Clara, California, USA >AC measurement for characterizing the trap processes in polysilicon TFTs
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AC measurement for characterizing the trap processes in polysilicon TFTs

机译：交流电测量，用于表征多晶硅TFT的陷阱工艺

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摘要

We report a new method for characterizing trap generation-recombination processes in Polysilicon TFTs. A small AC voltage was superimposed on a DC gate voltage and the ac current was measured at the source. A theoretical model has been developed, whereby n-channel TFTs have been analysed. A resonant peak in the imaginary part of the ac current and a corresponding step in the real part were found at the frequency of 147Hz. Our data indicate that the ac response is dominated by a single trap level. By combining the ac current measurement with low frequency capacitance measurement, we have determined the trap energy, capture cross section, trap density to be respectively 0.35eV above midgap, 3.1 x 10~(-21)cm~2, 5.7 x 10~(15) cm~(-3).
机译：我们报告了一种新的方法来表征多晶硅TFT中陷阱的产生-复合过程。将小的交流电压叠加在直流栅极电压上，并在电源处测量交流电流。已经开发出理论模型，从而分析了n沟道TFT。在147Hz的频率处发现了交流电流的虚部的谐振峰值和实部的相应阶跃。我们的数据表明，交流响应受单个陷阱电平的支配。通过将交流电流测量与低频电容测量相结合，我们确定陷阱能量，俘获截面，陷阱密度分别在中间能隙之上0.35eV，3.1 x 10〜（-21）cm〜2、5.7 x 10〜（ 15）厘米〜（-3）。

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