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Impact of Process Mechanical Simulation Methodology on Electronic Package Reliability Assessment

机译：工艺机械仿真方法学对电子封装可靠性评估的影响

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Mechanical reliability issues in electronic package have drawn significant attention inrnsemi-conductor industry for decades and have increased product development costrnsignificantly. Recent rapid growth of various portable electronic devices like netbook andrnsmartbook with increasing demand for more functionality in tighter space furtherrnchallenges the limit of mechanical reliability. To reduce the product development costrnand time-to-market, mechanical simulation has been extensively employed acrossrnsemiconductor industry for the purpose of design optimization and reliability assessment.rnThe importance of having the correct simulation methodology can?ˉt be overemphasizedrnconsidering the extent of its utilization throughout the whole product development cycle.rnIn this paper, we will discuss three fundamental mechanical modeling methodologies thatrnare widely used for flip-chip overmolded packages in the industry. The first approach isrnto assume whole package is stress-free initially at a given uniform temperature, which isrnusually the peak temperature of the mold cure profile. However, this differs from thernactual assembly process where reflow or cure temperature profiles are different at eachrnprocess step. The second approach takes that into account and assigns different initialrnstress-free temperature to different package component. The last approach explores thatrnidea further by simulating the actual assembly process, step by step through elementrnremoval and addition in the model. Details of each procedure are outlined in the paper.rnPackage End of Line (EOL) warpage predictions from these models on a real device arerncompared and validated with shadow or data. Reliability assessment regarding differentrnfailure mechanism based on these three modeling methodology is also included. Finally,rnwe will share our recommendation and highlight the advantage/disadvantage of eachrnmodeling methodology.rnThese statements do not reflect opinions from Qualcomm Inc. All data shared in thisrnpaper will be screened such that no confidential information is published or presented.
机译：电子封装中的机械可靠性问题已经引起半导体行业数十年的广泛关注，并且显着增加了产品开发成本。诸如上网本和智能笔记本之类的各种便携式电子设备近来的快速增长，以及在更紧凑的空间中对更多功能的需求不断增长，进一步挑战了机械可靠性的极限。为了降低产品开发成本和缩短上市时间，机械仿真已广泛应用于半导体行业，以进行设计优化和可靠性评估。不能过分强调采用正确的仿真方法的重要性，要考虑到整个开发过程中其利用率的程度。在整个产品开发周期中。在本文中，我们将讨论三种基本的机械建模方法，这些方法在业界被广泛用于倒装芯片包覆成型封装。第一种方法是假定整个包装最初在给定的均匀温度下没有应力，通常是模具固化曲线的峰值温度。但是，这与实际组装过程不同，在实际组装过程中，每个过程步骤的回流或固化温度曲线均不同。第二种方法考虑了这一点，并为不同的包装组件分配了不同的无初始应力的温度。最后一种方法是通过模拟实际的组装过程，进一步逐步地探索该膜翅目，逐步地删除和添加模型中的元素。本文概述了每个过程的详细信息。rn比较了在实际设备上来自这些模型的包装线末端（EOL）翘曲预测，并通过阴影或数据进行了验证。还包括基于这三种建模方法的关于不同失效机制的可靠性评估。最后，我们将分享我们的建议，并强调每种建模方法的优缺点。这些陈述并不反映高通公司的观点。本文中共享的所有数据都将经过筛选，以确保不会发布或提供任何机密信息。

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  • 来源
    《Device packaging 2010》|2010年|p.1|共1页
  • 会议地点 Scottsdale/Fountain Hills AZ(US)
  • 作者

    James Burrell; Zhongping Bao;

  • 作者单位

    Qualcomm Inc.rn5745 Pacific Center Blvd.rnSan Diego, CA 92121rnP: 858-845-3385rnE: jburrell@qualcomm.com;

    Qualcomm Inc.rn5745 Pacific Center Blvd.rnSan Diego, CA 92121;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 制造工艺;
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