Tokyo Electron Kyushu Ltd., 1-1 Fukuhara, Koshi city, Kumamoto, 861-1116, Japan;
Tokyo Electron Kyushu Ltd., 1-1 Fukuhara, Koshi city, Kumamoto, 861-1116, Japan;
Tokyo Electron Kyushu Ltd., 1-1 Fukuhara, Koshi city, Kumamoto, 861-1116, Japan;
Tokyo Electron Kyushu Ltd., 1-1 Fukuhara, Koshi city, Kumamoto, 861-1116, Japan;
Tokyo Electron Kyushu Ltd., 1-1 Fukuhara, Koshi city, Kumamoto, 861-1116, Japan;
imec, Kapeldreef 75, B-3001, Leuven, Belgium;
imec, Kapeldreef 75, B-3001, Leuven, Belgium;
This paper reports on post-litho CDU improvement by litho process optimization and also post-etch LWR reduction by litho and etch process optimization. EUVL; 16nm half pitch; CD uniformity; LWR/LER; through litho and etch;
机译:光刻-光刻-双刻蚀工艺中临界尺寸差的减小
机译:光刻-光刻-双刻蚀工艺中临界尺寸差的减小
机译:硬掩模对双图案光刻中光刻-平版蚀刻工艺反射率的影响
机译:EUV进程建立通过LITHO并蚀刻N7节点
机译:磷化铟和磷化铟基量子阱的深反应离子刻蚀,用于光子器件加工。
机译:在EUV大气模拟室上研究泰坦大气的光化学过程
机译:三个Litho-Process-Litho在32nm半间距节点处的2D双图案化方法