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Hydrogen in Ultralow Temperature SiO_2 for Nanocrystalline Silicon Thin Film Transistors

机译:纳米晶硅薄膜晶体管中超低温SiO_2中的氢

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Nanocrystalline silicon is a candidate material for fabricating thin film transistors with high carrier mobilities on plastic substrates. A major issue in the processing of nanocrystalline silicon thin film transistors (nc-Si:H TFTs) at ultralow temperatures is the quality of the SiO_2 gate dielectric. SiO_2 deposited at less than 250℃ by radio frequency plasma enhanced chemical vapor deposition (rf-PECVD), and not annealed at high temperature after deposition, exhibits high leakage current and voltage shifts when incorporated into TFT's. Secondary ion mass spectrometry (SIMS) measurements show that the hydrogen concentration (N_H) in PECVD oxide deposited at 150℃ on crystalline silicon (x-Si) is ~ 0.8 at. %. This is much higher than in thermal oxides on x-Si, which display concentrations of less than 0.003 at. %. The leakage current density for thermal oxides on x-Si at a bias of 10 V is ~9x10~(-6) A/cm~2 whereas for 200℃ PECVD oxides on nc-Si:H the current is ~1x10~(-4) A/cm~2. As the temperature of the SiO_2 deposition is reduced to 150℃ the current density rises by up to two orders of magnitude more. The H which is suspected to cause the leakage current across the PECVD oxide originates from the nc-Si:H substrate and the SiH_4 source gas. We analyzed the 300-nm gate oxide in capacitor structures of Al / SiO_2 / n~+ nc-Si:H / Cr / glass, Al / SiO_2 / n~+ nc-Si:H / x-Si, and Al / SiO_2 / x-Si. Vacuum annealing the nc-Si:H prior to PECVD of the oxide drives H out of the nc-Si:H film and reduces the amount of H incorporated into the oxide that is deposited on top. SiO_2 film deposition from SiH_4 and N_2O at high He dilution has a still greater effect on lowering N_H. The leakage current at a 10 V bias dropped from ~1x10~(-4) A/cm~2 to about ~2x10~(-6) A/cm~2 using He dilution at 250℃, and the vacuum anneal of the nc-Si:H lowered it by an additional factor of two. Thus we observe that both the nc-Si:H anneal and the SiO_2 deposition at high He dilution lessen the gate leakage current.
机译:纳米晶体硅是用于在塑料基板上制造具有高载流子迁移率的薄膜晶体管的候选材料。在超低温下处理纳米晶体硅薄膜晶体管(nc-Si:H TFT)的主要问题是SiO_2栅极电介质的质量。通过射频等离子体增强化学气相沉积(rf-PECVD)在低于250℃的温度下沉积的SiO_2,并且在沉积后未在高温下退火,当掺入TFT时会表现出高泄漏电流和电压漂移。二次离子质谱(SIMS)测量表明,在150℃下沉积在晶体硅(x-Si)上的PECVD氧化物中的氢浓度(N_H)为〜0.8 at。 %。这比x-Si上的热氧化物要高得多,后者的浓度小于0.003 at。 %。 x-Si上热氧化物在10 V偏压下的漏电流密度为〜9x10〜(-6)A / cm〜2,而nc-Si:H上200℃PECVD氧化物的漏电流密度为〜1x10〜(- 4)A / cm〜2。随着SiO_2沉积温度降低到150℃,电流密度增加了两个数量级。怀疑引起PECVD氧化物泄漏电流的H源自nc-Si:H衬底和SiH_4源气体。我们分析了Al / SiO_2 / n〜+ nc-Si:H / Cr /玻璃,Al / SiO_2 / n〜+ nc-Si:H / x-Si和Al / SiO_2的电容器结构中的300nm栅氧化层/ x-Si。在氧化物的PECVD之前对nc-Si:H进行真空退火可以将H驱离nc-Si:H膜,并减少掺入沉积在顶部氧化物中的H量。在高He稀释下从SiH_4和N_2O沉积SiO_2膜对降低N_H的影响更大。使用250℃的He稀释和nc的真空退火,在10 V偏压下的泄漏电流从〜1x10〜(-4)A / cm〜2降至约〜2x10〜(-6)A / cm〜2。 -Si:H将其降低了两倍。因此,我们观察到在高He稀释下nc-Si:H退火和SiO_2沉积都会降低栅极漏电流。

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