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首页> 外文会议>IEEE Lester Eastman Conference on High Performance Devices; 20040804-06; Rensselaer Polytechnic Institute >INFLUENCE OF THE N-DIFFUSION LAYER ON THE CHANNEL CURRENT AND THE BREAKDOWN VOLTAGE IN 4H-SiC SIT
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INFLUENCE OF THE N-DIFFUSION LAYER ON THE CHANNEL CURRENT AND THE BREAKDOWN VOLTAGE IN 4H-SiC SIT

机译：N扩散层对4H-SiC SIT中沟道电流和击穿电压的影响

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摘要

For a recessed gate (RG) silicon carbide (SiC) static induction transistor (SIT), an n-diffusion layer technique to maximize a maximum channel current (I_(MAX)) and realize an efficient breakdown voltage (BV) was presented. An n-diffusion layer having a doping profile of a Gaussian distribution was formed from the source to the channel region and introduced to elevate the doping concentration of the channel region. Through the simulation of a RG SiC SIT with an n-diffusion layer, it was verified that an n-diffusion layer technique was an excellent way to realize a very small width of a source region (W_s), resulting in an larger I_(MAX) and a higher BV simultaneously, and it was desirable to employ an n-diffusion layer having a slightly larger junction depth (X_j) than the depth of a gate trench (L_T) (L_T < X_j < 1.3L_T) into a RG SiC SIT with a small width of the source region (W_s ≈0.5 μm).
机译：对于凹栅（RG）碳化硅（SiC）静电感应晶体管（SIT），提出了一种n扩散层技术，以最大化最大沟道电流（I_（MAX））并实现有效击穿电压（BV）。从源极到沟道区形成具有高斯分布的掺杂轮廓的n扩散层，并引入该n扩散层以提高沟道区的掺杂浓度。通过对具有n扩散层的RG SiC SIT的仿真，证实了n扩散层技术是实现非常小的源极区宽度（W_s）的极好方法，从而导致了更大的I_（MAX ）和同时具有更高的BV，并且希望在RG SiC SIT中采用结深度（X_j）比栅极沟槽深度（L_T）（L_T

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