Parallel Testing Method by Partitioning Circuit Based on the Exhaustive Test

机译：基于穷举测试的分区电路并行测试方法

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This paper presents an approach, which is applicable to parallel testing, to the generation of test patterns using the partitioning technique based on the exhaustive testing scheme. The suggested method can discover faults faster than the exhaustive testing scheme. It also shows that testing can be performed in parallel using the functionally partitioned blocks, rather than in linear. In this paper, a functional level description as well as the Boolean differential is used to generate a test pattern that can be inserted into in parallel.

机译：本文提出一种适用于并行测试的方法，该方法使用基于穷举测试方案的分区技术来生成测试模式。建议的方法比穷举测试方案发现故障的速度更快。它还显示可以使用功能分区进行并行测试，而不是线性进行测试。在本文中，使用功能级别描述以及布尔微分来生成可以并行插入的测试模式。

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《International Conference on Computational Science and Its Applications(ICCSA 2004) pt.2; 20040514-20040517; Assisi; IT》|2004年|P.262-271|共10页
会议地点 Assisi(IT);Assisi(IT)
作者
Wu Woan Kim;
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作者单位

Division of Information and Communication Engineering, Kyungnam University, Masan, South Korea;

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原文格式 PDF
正文语种 eng
中图分类理论、方法;
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专利

1. A coordinated circuit partitioning and test generation method for pseudo-exhaustive testing of VLSI circuits [J] . Wen-Ben Jone, Papachristou C.A. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 1995,第3期

机译：用于vLSI电路的虚拟穷举测试的协调电路划分和测试生成方法
2. A storage-based built-in test pattern generation method for scan circuits based on partitioning and reduction of a precomputed test set [J] . Pomeranz I., Reddy S.M. IEEE Transactions on Computers . 2002,第11期

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3. Short-Circuit Testing Methods for Generator Circuit-Breakers with a Parallel Resistor [J] . van der Sluis L., van der Linden W. A. Power Engineering Review, IEEE . 1985,第10期

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4. Parallel Testing Method by Partitioning Circuit Based on the Exhaustive Test [C] . Wu Woan Kim International Conference on Computational Science and its Applications . 2004

机译：基于详尽测试的分区电路并行测试方法
5. Methodology of partitioning and exhaustive test pattern generation for builtin self-testing of VLSI circuits. [D] . Jone, Wen-Ben. 1988

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6. A General Framework for Formal Tests of Interaction after Exhaustive Search Methods with Applications to MDR and MDR-PDT [O] . Todd L. Edwards, Stephen D. Turner, Eric S. Torstenson, 2010

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7. Minimum test sets for locally exhaustive testing of combinational circuits with five outputs [O] . Yokohira, Tokumi, Shimizu, Toshimi, Michinishi, Hiroyuki, 1994

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Parallel Testing Method by Partitioning Circuit Based on the Exhaustive Test

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