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Advanced on-tool wafer temperature sensors and integration

机译:先进的工具上晶圆温度传感器和集成

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摘要

The needs for measuring the temperatures of wafers, photomasks or tool hardware under semiconductor process conditions are gaining attentions from both fabs and OEMs in recent years. For wafers and photomasks, the thermal environments during process directly control the reaction rates and reaction equilibrium of the process. For processing tools, any change in temperature within or nearby the process areas can have direct consequences on the device performance and yield rates. [1, 2] To highlight the critical roles that temperature play in modern semiconductor processing, consider the effect of a 3 degree Celsius temperature variation on a 12-inch wafer in the 10 nm node. The change in linear dimension due to such a temperature variation, is approximately 12 in × 25.4 mm/in × 10E-6 × 3, or ~914 nm. This is over 90 times the transistor length scale over the entire 12 inch wafer. Even if such temperature variation is limited to within a single 5mm × 5mm device area, the resulting shift in dimension is still on the order of 15 nm, significantly greater than the critical feature size that the technology node requires. In an era where multiple-patterning is becoming the standard practice, controlling such temperature-related alignment budget loss is critical.
机译:近年来,在半导体工艺条件下测量晶片,光掩模或工具硬件的温度的需求正受到晶圆厂和OEM的关注。对于晶片和光掩模,工艺过程中的热环境直接控制工艺的反应速率和反应平衡。对于处理工具,处理区域内或附近温度的任何变化都可能对器件性能和良率产生直接影响。 [1,2]为了突出温度在现代半导体处理中的关键作用,请考虑3摄氏度温度变化对10 nm节点中12英寸晶圆的影响。由于这种温度变化,线性尺寸的变化约为12 in×25.4 mm / in×10E-6×3或〜914 nm。这是整个12英寸晶圆上晶体管长度尺度的90倍以上。即使将这种温度变化限制在单个5mm×5mm的器件区域内,所产生的尺寸偏移仍约为15 nm,大大大于技术节点所需的关键特征尺寸。在多图案成为标准做法的时代,控制这种与温度相关的对准预算损失至关重要。

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