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HMC-Sim: A Simulation Framework for Hybrid Memory Cube Devices

机译：HMC-Sim：用于混合内存多维数据集设备的仿真框架

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摘要

The recent advent of stacked die memory and logic technologies has lead to a resurgence in research associated with fundamental architectural techniques. Many architecture research projects begin with ample simulation of the target theoretical functions and approach. However, the logical and physical nature three-dimensional stacked devices, such as the Hybrid Memory Cube (HMC) specification, fundamentally do not align with traditional memory simulation techniques. As such, there currently exists a chasm in the capabilities of modern architectural simulation frameworks. This work introduces a new simulation framework developed specifically for the Hybrid Memory Cube specification. We present a set of novel techniques implemented on an associated development framework that provide an infrastructure to flexibly simulate one or more Hybrid Memory Cube stacked die memory devices attached to an arbitrary core processor. The goal of this development infrastructure is to provide architectural simulation frameworks the ability to begin migrating current banked DRAM memory models to stacked HMC-based designs without a reduction in simulation fidelity or functionality. In addition to the core simulation architecture, this work also presents a series of memory workload test results using the infrastructure that elicit device, vault and bank utilization trace data from within a theoretical device. These evaluations have confirmed that HMC-Sim can provide insightful guidance in designing and developing highly efficient systems, algorithms, and applications, considering the next-generation three-dimensional stacked memory devices. HMC-Sim is currently open source, licensed under a BSD-style license and is freely available to the community.
机译：堆叠式裸片存储器和逻辑技术的最新出现导致与基础架构技术相关的研究重新兴起。许多建筑研究项目都是从对目标理论功能和方法进行充分的模拟开始的。但是，三维堆叠设备的逻辑和物理性质（例如混合内存多维数据集（HMC）规范）从根本上与传统的内存模拟技术不符。因此，现代建筑仿真框架的功能目前存在鸿沟。这项工作介绍了一个专门为混合内存多维数据集规范开发的新仿真框架。我们介绍了在关联的开发框架上实现的一组新颖技术，这些技术提供了可灵活模拟连接到任意核心处理器的一个或多个混合内存多维数据集堆叠式裸片存储设备的基础架构。此开发基础架构的目标是为体系结构仿真框架提供开始将当前存储的DRAM内存模型迁移到基于HMC的堆叠设计的能力，而不会降低仿真保真度或功能性。除了核心仿真体系结构之外，这项工作还使用从理论设备中引出设备，保管库和存储库利用率跟踪数据的基础结构，提供了一系列内存工作负载测试结果。这些评估已经证实，考虑到下一代三维堆叠存储设备，HMC-Sim可以为设计和开发高效的系统，算法和应用程序提供有见地的指导。 HMC-Sim当前是开源的，已获得BSD风格的许可，并且可以免费向社区使用。

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