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Improving MLC flash performance and endurance with extended P/E cycles

机译：通过延长P / E周期来提高MLC闪存性能和耐久性

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The traditional usage pattern for NAND flash memory is the program/erase (P/E) cycle: the flash pages that make a flash block are all programmed in order and then the whole flash block needs to be erased before the pages can be programmed again. The erase operations are slow, wear out the medium, and require costly garbage collection procedures. Reducing their number is therefore beneficial both in terms of performance and endurance. The physical structure of flash cells limits the number of opportunities to overcome the 1 to 1 ratio between programming and erasing pages: a bit storing a logical 0 cannot be reprogrammed to a logical 1 before the end of the P/E cycle. This paper presents a technique to minimize the number of erase operations called extended P/E cycle. With extended P/E cycles, the flash pages can be programmed many times before the whole flash block needs to be erased, reducing the number of erase operations. We study the applicability of the technique to Multi Level Cell (MLC) NAND flash chips, and present a design and implementation on the OpenSSD prototyping board. The evaluation of our prototype shows that this technique can achieve erase operations reduction as high as 85%, with latency speedups of up to 67%, with respect to a FTL with traditional P/E cycles, and naive greedy garbage collection strategy. Our evaluation leads to valuable insights on how extended P/E cycles can be exploited by future applications.
机译：NAND闪存的传统使用模式是编程/擦除（P / E）周期：构成闪存块的闪存页面均按顺序进行编程，然后需要擦除整个闪存块，然后才能再次对页面进行编程。擦除操作很慢，会耗尽介质，并需要昂贵的垃圾收集程序。因此，减少它们的数量在性能和耐用性上都是有益的。闪存单元的物理结构限制了克服编程页和擦除页之间1对1比率的机会：在P / E周期结束之前，不能将存储逻辑0的位重新编程为逻辑1。本文提出了一种将擦除操作的数量减至最少的技术，称为扩展P / E周期。通过延长的P / E周期，可以在需要擦除整个闪存块之前对闪存页面进行多次编程，从而减少了擦除操作的次数。我们研究了该技术对多层单元（MLC）NAND闪存芯片的适用性，并在OpenSSD原型板上提出了一种设计和实现。对我们原型的评估表明，相对于具有传统P / E周期的FTL和幼稚的贪婪垃圾回收策略，该技术可以实现高达85％的擦除操作减少，延迟加速高达67％。我们的评估可以为将来的应用程序如何利用扩展的P / E周期提供宝贵的见解。

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