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Novel Methods for Improving Performance and Reliability of Flash-Based Solid State Storage System

机译：提高基于闪存的固态存储系统性能和可靠性的新方法

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摘要

Though SSDs outperform traditional magnetic-based storage devices, there is still potential for further performance improvements. In existing operating systems, the software I/O stack is designed considering the working mechanisms of the traditional magnetic-based hard drives. Therefore, it has been shown that the existing I/O software layer can cause additional operational overheads for flash-based SSDs]. To address this problem, we explore the influence factors which will lead to variation of the performance of SSD. Based on our observation, we proposed a SSD-based I/O scheduler called SBIOS that fully exploits the internal parallelism to improve the performance. It dispatches the read requests to different blocks to make full use of SSD internal parallelism. For write requests, it attempts to dispatch write requests to the same block to minimize the number of the block cross requests. Moreover, SBIOS introduces the conception of batch processing and separates read and write requests to avoid read-write interference.;Besides, SSDs face reliability challenges due to the physical properties of flash memory.to fix the reliability issue of SSD, we propose a parallel and garbage collection aware I/O Scheduler called PGIS that identifies the hot data based on trace characteristics to exploit the channel level internal parallelism of flash-based storage systems. PGIS not only fully exploits abundant channel resource in the SSD, but also introduces a hot data identification mechanism to reduce the garbage collection overhead. By dispatching hot read data to the different channel, the channel level internal parallelism is fully exploited. By dispatching hot write data to the same physical block, the garbage collection overhead has been alleviated. The experiment results show that these methods significantly improve the reliability and performance of the SSD. In this research, the total number of erase operations is introduced to measure the reliability of SSD.;Meanwhile, with the rapid development of non-violate technology, due to high read/write speed, high endurance, in-place updating of PCM, many hybrid storage structures which use PCM and SSD at the same storage level have been proposed to improve the performance of SSD. However, hybrid storage systems pose a new challenge to cache management algorithms. Existing DRAM-based cache management schemes are only optimized to reduce the miss rate. On a miss, the cache needs to access the PCM or the SSD. However there are major performance differences between the access times of the two different technologies. As a result, in such a hybrid system, a higher hit rate does not necessarily translate to higher performance. To address this issue, we propose a Miss Penalty Aware cache management scheme (short for MPA) which takes the asymmetry of cache miss penalty on PCM and SSD into consideration. Our MPA scheme not only uses the access locality to reduce the miss rate, but also assigns higher priorities to SSD requests located in the page cache to avoid the high miss penalty overhead. Our experimental results show that our MPA scheme can significantly improve the hybrid storage system performance by up to 30.5% compared with other cache management schemes.
机译：尽管SSD的性能优于传统的基于磁的存储设备，但仍有可能进一步提高性能。在现有的操作系​​统中，软件I / O堆栈的设计考虑了传统基于磁的硬盘驱动器的工作机制。因此，已经表明，现有的I / O软件层会导致基于闪存的SSD产生额外的操作开销。为了解决这个问题，我们探讨了导致SSD性能变化的影响因素。根据我们的观察，我们提出了一种基于SSD的I / O调度程序，称为SBIOS，该程序充分利用了内部并行性来提高性能。它将读取请求分派到不同的块，以充分利用SSD内部并行性。对于写请求，它尝试将写请求分派到同一块，以最大程度地减少块交叉请求的数量。此外，SBIOS引入了批处理的概念，并且将读写请求分开，以避免读写干扰;此外，SSD还由于闪存的物理特性而面临可靠性挑战。为解决SSD的可靠性问题，我们提出了并行处理的概念。具有垃圾收集功能的I / O调度程序（称为PGIS）可根据跟踪特征识别热数据，以利用基于闪存的存储系统的通道级内部并行性。 PGIS不仅充分利用了SSD中丰富的通道资源，而且还引入了一种热数据识别机制来减少垃圾收集的开销。通过将热读取数据分配到其他通道，可以充分利用通道级别的内部并行性。通过将热写入数据分配到同一物理块，可以减少垃圾收集的开销。实验结果表明，这些方法可以显着提高SSD的可靠性和性能。在这项研究中，介绍了擦除操作的总数以衡量SSD的可靠性。同时，随着非违规技术的飞速发展，由于高读写速度，高耐久性，PCM就地更新，已经提出了许多在相同存储级别使用PCM和SSD的混合存储结构来提高SSD的性能。但是，混合存储系统对缓存管理算法提出了新的挑战。现有的基于DRAM的缓存管理方案仅经过优化以降低未命中率。如果未命中，则高速缓存需要访问PCM或SSD。但是，两种不同技术的访问时间之间存在主要的性能差异。结果，在这种混合系统中，较高的命中率未必转化为较高的性能。为了解决此问题，我们提出了一种“未命中惩罚感知”缓存管理方案（MPA的缩写），该方案考虑了PCM和SSD上的不命中缓存惩罚的不对称性。我们的MPA方案不仅使用访问位置来降低未命中率，而且还为位于页面缓存中的SSD请求分配了更高的优先级，以避免高的未命中代价开销。我们的实验结果表明，与其他缓存管理方案相比，我们的MPA方案可以显着提高混合存储系统性能高达30.5％。

著录项

  • 作者

    Guo, Jiayang.;

  • 作者单位

    University of Cincinnati.;

  • 授予单位 University of Cincinnati.;
  • 学科 Computer science.
  • 学位 Ph.D.
  • 年度 2018
  • 页码 131 p.
  • 总页数 131
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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