A novel GCSCR structure for ESD protection application

机译：用于ESD保护应用的新型GCSCR结构

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A novel gate-coupled silicon-controlled rectifier (GCSCR) device is proposed and realized in a 0.35-um BiCMOS process for electrostatic-discharge (ESD) applications. Without using an external trigger circuitry, the GCSCR has a trigger voltage as low as 9 V to effectively protect deep-submicrometer MOS circuits. The ESD robustness of the novel SCR in positive operations are higher than 60mA/um, thus the new device is more suitable for low-voltage integrated circuit ESD protection applications.

机译：提出了一种新颖的栅极耦合可控硅（GCSCR）器件，并以0.35um BiCMOS工艺实现了该器件的静电放电（ESD）应用。在不使用外部触发电路的情况下，GCSCR的触发电压低至9 V，可有效保护深亚微米MOS电路。新型SCR在正向工作时的ESD鲁棒性高于60mA / um，因此，该新器件更适合于低压集成电路ESD保护应用。

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《IEEE International Nanoelectronics Conference》|2016年|1-2|共2页
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Liu Zhao; Jizhi Liu; Hui Chen; Rui Tian; Zhiwei Liu;
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Electrostatic discharges; Thyristors; Anodes; Logic gates; MOS devices; Robustness; Integrated circuits;

机译：静电放电;晶闸管;阳极;逻辑门; MOS器件;稳健性;集成电路;

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机译：ESD保护结构，具有减小的电容和过冲电压，适用于高速接口应用
2. Layout optimization of GGISCR structure for on-chip system level ESD protection applications [J] . Zeng Jie, Dong Shurong, Wong Hei, Solid-State Electronics . 2016,第deca期

机译：片上系统级ESD保护应用的GGISCR结构的布局优化
3. In Situ ESD Protection Structure for Variable Operating Voltage Interface Applications in 28-nm CMOS Process [J] . Sirui Luo, Salcedo J.A., Parthasarathy S., Device and Materials Reliability, IEEE Transactions on . 2014,第4期

机译：适用于28 nm CMOS工艺中可变工作电压接口应用的原位ESD保护结构
4. A novel GCSCR structure for ESD protection application [C] . Liu Zhao, Jizhi Liu, Hui Chen, IEEE International Nanoelectronics Conference . 2016

机译：用于ESD保护应用的新型GCSCR结构
5. Design and characterization of novel devices for new generation of electrostatic discharge (ESD) protection structures [D] . Salcedo, Javier A. 2006

机译：新一代静电放电（ESD）保护结构的新型器件的设计和特性
6. Novel High Holding Voltage SCR with Embedded Carrier Recombination Structure for Latch-up Immune and Robust ESD Protection [O] . Zhuo Wang, Zhao Qi, Longfei Liang, 2019

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7. An advanced integrated process and ESD protection structure to optimize the GOI, HCE, and ESD performance for sub-quarter micron technology [O] . Shih J.R. 2012

机译：先进的集成工艺和ESD保护结构，可针对四分之一微米技术优化GOI，HCE和ESD性能

A novel GCSCR structure for ESD protection application

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