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0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

机译:0.4V可重新配置近阈值TCAM在28nm高k金属栅极门CMOS工艺中

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This paper presents a near-threshold configurable ternary content addressable memory (TCAM) design for energy-constrained neural network or software-defined network (SDN) applications. A TCAM architecture based on foundry-based 6 T SRAM mini-array improves area efficiency and minimizes disturbs to enable operation down to 0.4V, and provides configurable lookup tables for users. To minimize dynamic power consumption, hierarchical precharge structure (HPRE) and don't-care based ripple search-line scheme are utilized for decreasing both the switching activities and wire capacitance. Moreover, power-gating technique, self-timed control and Vtrip -tracking write-assist are used to reduce standby power, speed-up propagation delays of global signals and improve write-ability at low voltage, respectively. A reconfigurable TCAM is implemented using UMC 28nm high-k metal gate (HKMG) CMOS process. The design achieves operating frequency of 240MHz (20MHz) with energy consumption of 1.146 (0.621) fJ/bit/search at 0.9V (0.4V).
机译:本文介绍了用于能量受限神经网络或软件定义网络(SDN)应用的近阈值可配置的三元内容可寻址存储器(TCAM)设计。基于基于铸造的6 T SRAM迷你阵列的TCAM架构提高了面积效率,并最大限度地减少了扰动以使操作降至0.4V,为用户提供可配置的查找表。为了最大限度地减少动态功耗,分层预充电结构(HPRE)和基于不小心的纹波搜索线方案用于减少切换活动和电线电容。此外,供电技术,自定时控制和VTRIP -Tracking写辅助用于减少待机功率,全局信号的​​加速传播延迟,并分别提高低电压的写入能力。使用UMC 28NM高k金属栅极(HKMG)CMOS工艺来实现可重构的TCAM。该设计实现了240MHz(20MHz)的工作频率,能耗为1.146(0.621)FJ /位/搜索0.9V(0.4V)。

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