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Tutorial 2B: CMOS integrated system on a chip for neural interface applications

机译：教程2B：用于神经接口应用的芯片上的CMOS集成系统

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The last decade has seen an explosion in research efforts which attempt to miniaturize rack-mounted, neural interface electronics to a form that is easily implantable for in vivo applications. Commensurate with this trend, neural scientist and engineers are demanding higher performance electronics for neural stimulation, recording, encoding, communication and energy harvesting, all in the context of a closed-loop neural interface. Single-chip integration of all the desired electronics appears to be the obvious solution for practical Bidirectional Brain Computer Interfaces (BBCI). However, challenges remain to realize a closed-loop neural interface which must utilize minimal energy, produce high voltages and suppress unwanted spurious signals which are created by “simulation artifacts.” This presentation will start with an overview of integrated neural interface electronics and conclude with a description of some recent work conducted at University of Washington's Center for Sensorimotor Neural Engineering (CSNE).
机译：去年的最后十年已经看到了研究努力，试图将架子安装的神经接口电子产品小型化到易于植入体内应用的形式。与这种趋势相称，神经科学家和工程师要求在闭环神经界面的背景下苛刻神经刺激，记录，编码，通信和能量收集的高性能电子。所有所需电子设备的单芯片集成似乎是实用双向脑电脑接口（BBCI）的明显解决方案。然而，挑战仍然是实现必须利用最小能量的闭环神经接口，产生高电压并抑制由“模拟伪影”产生的不需要的杂散信号。本演示文稿将概述综合神经界面电子产品及结束，并结束于华盛顿大学传感器神经工程中心（CSNE）的一些最近进行的一些工作。

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