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Hardware Implementation of Compressed Data Packing

机译:压缩数据打包的硬件实现

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Data compression algorithm based on the usage of different length code for symbol representation may be effective only if output stream is tightly packed. Hardware realization of these procedures has definite advantages in comparison with the software execution. Structures of devices that provide fast packing and decoding messages encoded according Huffman and similar algorithms are presented. Messages may be packed into dense bit sequence or word-by-word sequence. Both forms are discussed.
机译:仅在输出流被紧紧打包的情况下,基于使用不同长度代码进行符号表示的数据压缩算法才有效。与软件执行相比,这些过程的硬件实现具有明显的优势。提出了提供快速打包和解码根据霍夫曼编码和类似算法编码的消息的设备的结构。消息可以打包成密集的位序列或逐字序列。讨论了两种形式。

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