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首页> 外文会议>International Symposium on VLSI Design and Test >Loop unrolling with fine grained power gating for runtime leakage power reduction
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Loop unrolling with fine grained power gating for runtime leakage power reduction

机译：用细粒电功率门控运行时泄漏功率降低的循环

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摘要

The present work introduces a compilation technique to reduce runtime leakage power of functional units of a processor by combining loop unrolling with power gating. The instructions in the unrolled loop are scheduled to provide opportunities for power gating the functional units which are not in need for a considerable amount of time. The number of clock cycles taken by the power gating instructions is less than or equal to the number of clock cycles saved by loop unrolling. This results in 23–64% reduction of the total energy consumed by the benchmark programs without any degradation of performance.
机译：本工作引入了一种编译技术，通过与功率门控展开的环路展开，减少处理器功能单元的运行时泄漏功率。展开回路中的指令被调度为提供功率门控的机会，该功能单元的功能单元不需要相当多的时间。功率门控指令所采取的时钟周期数小于或等于循环展开节省的时钟周期的数量。这导致基准计划的总能量减少23-64％，而不会进行任何绩效劣化。

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