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首页> 外文会议>18th International Symposium on VLSI Design and Test >Loop unrolling with fine grained power gating for runtime leakage power reduction
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Loop unrolling with fine grained power gating for runtime leakage power reduction

机译：具有细粒度电源门控的环路展开功能可减少运行时的泄漏功率

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摘要

The present work introduces a compilation technique to reduce runtime leakage power of functional units of a processor by combining loop unrolling with power gating. The instructions in the unrolled loop are scheduled to provide opportunities for power gating the functional units which are not in need for a considerable amount of time. The number of clock cycles taken by the power gating instructions is less than or equal to the number of clock cycles saved by loop unrolling. This results in 23–64% reduction of the total energy consumed by the benchmark programs without any degradation of performance.
机译：本工作介绍了一种通过将循环展开与功率门控相结合来减少处理器功能单元的运行时泄漏功率的编译技术。展开循环中的指令被安排为为不需要较长时间的功能单元加电门提供机会。电源门控指令占用的时钟周期数小于或等于循环展开所节省的时钟周期数。这样可以使基准程序所消耗的总能量减少23–64％，而不会降低性能。

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