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首页> 外文会议>IEEE Electronic Components and Technology Conference >Chip Package Interaction (CPI) risk assessment of 22FDX® Wafer Level Chip Scale Package (WLCSP) using 2D Finite Element Analysis modeling
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Chip Package Interaction (CPI) risk assessment of 22FDX® Wafer Level Chip Scale Package (WLCSP) using 2D Finite Element Analysis modeling

机译：使用2D有限元分析模型对22FDX®晶圆级芯片级封装（WLCSP）进行芯片封装交互（CPI）风险评估

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In order to address the Chip-Package Interaction (CPI) risks associated with the Wafer Level Chip Scale Package (WLCSP), GLOBALFOUNDRIES has developed Finite Element (FE) models to simulate the mechanical stress in the Backend of Line (BEoL) and Far Back End of Line (FBEoL) during mass reflow process. This paper discusses the CPI failure risk associated with WLCSP, modeled with and without the redistribution layers (RDL) introduction above the BEoL. The WLCSP model has been modified to assess the design variations within the RDL and the FBEoL. The paper also highlights the FE model verification between the two-dimensional (2D) versus the three-dimensional (3D) models and validation by comparing the simulation results to the experimental test data.
机译：为了解决与晶圆级芯片级封装（WLCSP）相关联的芯片包交互（CPI）风险，GlobalFoundries开发了有限元（FE）模型，以模拟线路后端（BEOL）和远处的机械应力大量回流过程中的线（FBEOL）结束。本文讨论了与WLCSP相关的CPI失败风险，用BEOL上方的再分配层（RDL）建模和没有再分配层（RDL）。 WLCSP模型已被修改为评估RDL和FBEOL内的设计变化。本文还突出了二维（2D）与三维（3D）模型和验证之间的FE模型验证，通过将仿真结果与实验测试数据进行比较。

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