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A CAD tool for Stochastic Macromodel generation and analog IP characterization for system level application

机译:用于系统级应用的随机宏模型生成和模拟IP表征的CAD工具

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Process variations have increased significantly with scaling technologies. This has led to deviations in analog circuit performance from their expected values. Macromodeling of analog circuits is emerging to be an essential paradigm of CAD, leading to significant benefits for simulation, design space exploration, inter process migration, test development etc. In this work, we develop a CAD tool for automatic generation of macromodels from available specifications and extend the methodology to model the effect of process variation induced soft parametric faults. Simulation results illustrate that the methodology is suitable for accurate macromodeling with objective of rapid simulation. In addition, the performance of circuits under process variation can be effectively statistically modeled for the estimation of system level yield.
机译:规模化技术使工艺变化显着增加。这导致模拟电路性能偏离其预期值。模拟电路的宏模型正在成为CAD的基本范式,从而为仿真,设计空间探索,进程间迁移,测试开发等带来了显着收益。在这项工作中,我们开发了一种CAD工具,可根据可用规格自动生成宏模型并扩展了方法,以对过程变化引起的软参数故障的影响进行建模。仿真结果表明,该方法适用于以快速仿真为目标的精确宏建模。另外,可以有效地对过程变化下的电路性能进行统计模型化,以估计系统级的成品率。

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