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A pipelined 3-level bandpass delta-sigma modulator for class-S power amplifiers

机译:用于S类功率放大器的流水线3级带通delta-sigma调制器

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A digital bandpass delta-sigma modulator for class-S power amplifiers is presented. In comparison to a 2-level modulator coding efficiency can be increased by 10% over a large input power range with a 3-level modulator. Scaling the quantizer thresholds offers a trade-off between coding efficiency and signal-to-noise ratio. The bandpass modulator architecture allows twofold interleaving. A constraint on the quantizer thresholds and the feedback values reduces the effective operand word width in the feedback loop to the 5 most significant bits. Pipelining of the less significant bits leads to a short critical path. Interleaving and pipelining promise fast operation and thus a high maximum signal frequency.
机译:提出了一种用于S类功率放大器的数字带通delta-sigma调制器。与2级调制器相比,使用3级调制器可以在较大的输入功率范围内将编码效率提高10%。缩放量化器阈值可在编码效率和信噪比之间进行权衡。带通调制器架构允许双重交织。量化器阈值和反馈值的约束将反馈循环中的有效操作数字宽减少到5个最高有效位。较低有效位的流水线会导致关键路径较短。交织和流水线技术保证了快速运行,因此具有很高的最大信号频率。

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