In this work, we mainly present our current development progress of high efficiency rear-emitter heterojunction solar cells using n-type silicon wafers, in three areas: a) silicon wafer surface texture treatment, b) a-Si:H(i) layer optimization for obtaining superior wafer surface passivation, and c) various TCO layer characterizations for improving the Jsc of the solar cells. We attained 20.78%, 21.56% and 21.94% efficiencies of rear-emitter heterojunction solar cells on n-type silicon wafers, with using ITO, ITiO and IWO as TCOs, respectively.
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