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首页> 外文会议>Design, Automation and Test in Europe Conference and Exhibition >ARM-on-ARM: Leveraging Virtualization Extensions for Fast Virtual Platforms
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ARM-on-ARM: Leveraging Virtualization Extensions for Fast Virtual Platforms

机译：ARM-on-ARM：利用用于快速虚拟平台的虚拟化扩展

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Virtual Platforms (VPs) are an essential enabling technology in the System-on-a-Chip (SoC) development cycle. They are used for early software development and hardware/soft- ware codesign. However, since virtual prototyping is limited by simulation performance, improving the simulation speed of VPs has been an active research topic for years. Different strategies have been proposed, such as fast instruction set simulation using Dynamic Binary Translation (DBT). But even fast simulators do not reach native execution speed. They do however allow executing rich Operating System (OS) kernels, which is typically infeasible when another OS is already running.Executing multiple OSs on shared physical hardware is typically accomplished by using virtualization, which has a long history on x86 hardware. It enables encapsulated, native code execution on the host processor and has been extensively used in data centers, where many users share hardware resources. When it comes to embedded systems, virtualization has been made available recently. For ARM processors, virtualization was introduced with the ARM Virtualization Extensions for the ARMv7 architecture. Since virtualization allows native guest code execution, near-native execution speeds can be reached.In this work we present a VP containing a novel ARMv8 SystemC Transaction Level Modeling 2.0 (TLM) compatible processor model. The model leverages the ARM Virtualization Extensions (VE) via the Linux Kernel-based Virtual Machine (KVM) to execute the target software natively on an ARMv8 host. To enable the integration of the processor model into a loosely-timed VP, we developed an accurate instruction counting mechanism using the ARM Performance Monitors Extension (PMU). The requirements for integrating the processor model into a VP and the integration process are detailed in this work.Our evaluations show that speedups of up to 2.57x over state-of-the-art DBT-based simulator can be achieved using our processor model on ARMv8 hardware.
机译：虚拟平台（VPS）是系统上芯片（SOC）开发周期中的必备促进技术。它们用于早期软件开发和硬件/软件编号。但是，由于虚拟原型由仿真性能受到限制，因此需要提高VPS的模拟速度，这是多年来的主动研究课题。已经提出了不同的策略，例如使用动态二进制转换（DBT）的快速指令集仿真。但即使是快速的模拟器也没有达到本土执行速度。但是，它们确实允许执行富有的操作系​​统（OS）内核，这通常是不可行的，当另一个操作系统已经在运行时.Executing ISS在共享物理硬件上通常通过使用虚拟化来完成，在X86硬件上具有很长的历史。它可以在主处理器上封装，本机代码执行，并已广泛用于数据中心，其中许多用户共享硬件资源。涉及到嵌入式系统时，最近已经提供了虚拟化。对于ARM处理器，使用ARMv7架构的ARM虚拟化扩展引入了虚拟化。由于虚拟化允许本机客户代码执行，因此可以达到近尾执行速度。此工作我们呈现一个包含新型ARMv8 SystemC交易级别建模2.0（TLM）兼容处理器模型的VP。该模型通过基于Linux内核的虚拟机（KVM）利用ARM虚拟化扩展（VE）来在ARMv8主机上本地执行目标软件。要使处理器模型集成到一个松散定时的VP中，我们使用ARM性能监视器扩展（PMU）开发了一种准确的指令计数机制。在这项工作中详细说明将处理器模型集成到VP中的要求和集成过程。评估显示，可以使用我们的处理器模型实现高达2.57倍的超级型DBT的模拟器的加速ARMv8硬件。

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