首页> 外文会议>Electronic Components and Technology Conference, 1995. Proceedings., 45th >Electrical characterization and modeling of simultaneous switchingnoise for leadframe packages
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Electrical characterization and modeling of simultaneous switchingnoise for leadframe packages

机译:同步开关的电气特性和建模引线框封装的噪声

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Quad-flat packages with a leadframe made of copper (Cu), or alloy42 are widely used for CMOS digital applications. As the clock speed ofCMOS VLSIs increases, the package inductance is considered to be alimiting factor for their performance. To investigate the relationshipbetween package inductance and switching noise, three types of leadframematerials, Cu, alloy 42, and Ag-plated alloy 42 were prepared.Frequency-dependent properties of leadframe materials were measured upto a high frequency range. Then, extensive experiments were executed byusing a CMOS noise generating chip to measure how leadframe materialsinfluence switching noise in conjunction with output buffercharacteristics. The alloy 42 leadframe is believed to be unsuitable forhigh-speed CMOS applications because of its high permeability offerromagnetics. However, it has been proved that the large inductancedifference at lower frequencies does not greatly affect switching noiseat practical operating frequencies. A modeling approach for leadframepackages was executed by taking mutual inductances into considerationand by using the measured values of inductances and resistance
机译:具有由铜(Cu)或合金制成的引线框架的四方扁平封装 42被广泛用于CMOS数字应用。作为时钟速度 CMOS VLSI增加,因此封装电感被认为是 限制其性能。调查关系 封装电感和开关噪声之间的关系,三种引线框架 制备Cu,合金42和镀银合金42的材料。 测量了引线框架材料的频率相关特性 到高频率范围。然后,通过 使用CMOS噪声产生芯片来测量引线框材料的方式 与输出缓冲器一起影响开关噪声 特征。合金42引线框被认为不适合用于 高速CMOS应用由于其高导磁率 铁磁。但是,已经证明大电感 较低频率下的差异不会极大地影响开关噪声 在实际工作频率下。引线框架的建模方法 封装是通过考虑互感来执行的 并使用电感和电阻的测量值

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