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首页> 外文会议>IEEE Symposium on VLSI Technology >Selective Pore-Sealing of Highly Porous Ultralow-k dielectrics for ULSI Interconnects by Cyclic Initiated Chemical Vapor Deposition Process
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Selective Pore-Sealing of Highly Porous Ultralow-k dielectrics for ULSI Interconnects by Cyclic Initiated Chemical Vapor Deposition Process

机译：通过循环引发化学气相沉积工艺对用于ULSI互连的高多孔超低k电介质进行选择性孔密封

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摘要

A selective pore-sealing of highly porous ultralow-k (pULK) dielectrics by a cyclic initiated CVD (iCVD) process has been successfully developed. A negligible increase of the pULK thickness and the k value was achieved even after the hermetic pore-sealing. The pore-sealed pULK films show low leakage current and excellent dielectric reliability, comparable to the commercialized low-k dielectric. The selective pore-sealing process does not deposit the pore-sealing layer on Cu surface. The porosity difference between pULK and Cu surfaces is attributed to the origin of the selectivity in the cyclic iCVD process.
机译：通过循环启动CVD（iCVD）工艺成功开发了高孔隙度超低k（pULK）电介质的选择性孔密封。即使在气孔密封之后，pULK厚度和k值的增加也可以忽略不计。与商业化的低k电介质相比，经孔密封的pULK膜显示出低泄漏电流和出色的电介质可靠性。选择性的气孔密封工艺不会在铜表面上沉积气孔密封层。 pULK和Cu表面之间的孔隙率差异归因于循环iCVD过程中选择性的起源。

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