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首页> 外文会议>Canadian Conference on Electrical and Computer Engineering >DYNAMIC PROGRAMMING APPROACH TO HIGH FRAME-RATE STEREO CORRESPONDENCE: A PIPELINED ARCHITECTURE IMPLEMENTED ON A FIELD PROGRAMMABLE GATE ARRAY
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DYNAMIC PROGRAMMING APPROACH TO HIGH FRAME-RATE STEREO CORRESPONDENCE: A PIPELINED ARCHITECTURE IMPLEMENTED ON A FIELD PROGRAMMABLE GATE ARRAY

机译：高帧速率立体声对应的动态编程方法：在现场可编程门阵列上实现的流水线架构

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摘要

Estimation of depth within an imaged scene can be formulated as a stereo correspondence problem. Typical software solutions tend to be too slow for high frame rate (i.e. ≥ 30 fps) performance. Equivalent hardware solutions, however, can result in marked improvements. This paper explores one such pipelined hardware implementation that generates dense binocular disparity (depth) estimates at frame rates of up to 200 fps or more. The architecture is based on a dynamic programming maximum likelihood (DPML) formulation developed by Cox et al. [1]. A field programmable gate array (FPGA) implementation of this architecture demonstrates equivalent accuracy while executing at significantly higher frame rates. It is noted that the architecture holds potential for more generalized hardware implementations of dynamic programming solutions [2].
机译：可以将成像场景内的深度估计作为立体对应问题。典型的软件解决方案对于高帧速率（即≥30FPS）性能往往太慢。然而，等效硬件解决方案可能导致显着的改进。本文探讨了一个这样的流水线硬件实现，该实现在最多200 FPS或更多的帧速率下产生密集的双目视差（深度）估计。该体系结构基于Cox等人开发的动态编程最大似然（DPML）配方。 [1]。该架构的现场可编程门阵列（FPGA）实现在显着更高的帧速率下执行等效的准确性。注意，该体系结构具有动态编程解决方案的更广泛硬件实现的潜力[2]。

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