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Performance evaluation of 16 nm FinFET based NAND and D flip-flop using BSIM-CMG model

机译：使用BSIM-CMG模型的16 nm FinFET的NAND和D触发器性能评估

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Digital circuits are the heart of any modern micro-processor or micro-controller. Because of the vast advantages over analog integrated circuits, digital circuits are superior in terms of speed, performance and consume less power. Nowadays, digital designs are made up using semiconductor elements like MOSFET. This provides high speed performance. Since the last forty years, integrated circuits have been improving as per the Moore's law. Reduction in size of transistors introduce several problems like SCE. One of the possible solution is FinFET which can mitigate the problems. Using FinFET and its different topologies NAND gate and positive edge-triggered D flip-flop are examined at 16nm technology. Simulation is done using HSPICE and BSIM-CMG FinFET model. By changing gate geometry and substrate, results are carried out. From the results we can conclude that quadruple gate is better option in terms of delay, average power and current compare to tri-gate and double gate FinFET.
机译：数字电路是任何现代微处理器或微控制器的核心。由于模拟集成电路的巨大优势，数字电路在速度，性能和消耗较少的功率方面优越。如今，使用像MOSFET这样的半导体元件来组成数字设计。这提供了高速性能。自从最后四十年以来，集成电路根据摩尔定律一直在改善。晶体管尺寸的减小引入了SCE等几个问题。其中一个可能的解决方案是可以减轻问题的FinFET。使用FinFET及其不同的拓扑栅极和正边缘触发D触发器，在16nm技术中检查。使用HSPICE和BSIM-CMG FinFET模型进行仿真。通过改变栅极几何和衬底，进行结果。结果我们可以得出结论，在与三栅极和双栅FinFET比较的延迟，平均功率和电流方面是更好的选择。

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