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Failure Mechanisms and Lifetime Simulation Method for Nano Scale CMOS Device

机译:纳米CMOS器件的失效机理及寿命仿真方法

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摘要

In nano scale, the degradation failure mechanism for CMOS device such as hot-carrier injection, breakdown of thin oxides, electro-migration and NBTI (Negative Bias Temperature Instability) induced damage become a major reliability concern. Physics-of-Failure method is used in lifetime prediction of nano scale CMOS, which integrates loading condition, package, geometry and material with time-to-failure. Common lifetime models for these mechanisms are described and a method to estimate lifetime of nano-scale CMOS device, with simulation based on Physics-of-Failure. Through Failure Mode, Mechanism and Effect Analysis, failure mechanism and lifetime models are clarified and selected, as well as structure, material, processing parameters and environment conditions. Stress analysis, which includes electrical stress by EDA and thermal analysis by FEA (Finite Element Analysis) are carried out to acquire parameters in lifetime model. Damage accumulation algorism and competing theory are utilized to predict lifetime of the device. This method will help CMOS device design engineers better understand the failure mechanisms in nano-scale and take design-for-reliability measures.
机译:在纳米级,诸如热载流子注入,薄氧化物的击穿,电迁移和NBTI(负偏压温度不稳定性)引起的损坏等CMOS器件的劣化失效机理成为人们关注的主要可靠性问题。故障物理方法用于纳米级CMOS的寿命预测,该方法将加载条件,封装,几何形状和材料与故障时间结合在一起。描述了这些机制的常见寿命模型,以及通过基于故障物理的仿真估算纳米级CMOS器件寿命的方法。通过失效模式,机理和效果分析,阐明并选择失效机理和寿命模型,以及结构,材料,加工参数和环境条件。进行应力分析,包括通过EDA进行电应力分析和通过FEA(有限元分析)进行热分析,以获取寿命模型中的参数。损伤累积算法和竞争理论可用来预测设备的寿命。这种方法将帮助CMOS器件设计工程师更好地了解纳米级的故障机理,并采取可靠性设计措施。

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