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CD control of ASIC polysilicon gate level

机译：ASIC多晶硅栅极级的CD控制

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Abstract: As ASIC manufacture continues to evolve towards 0.35 micrometer, photolithography optimization becomes increasingly complex. I-line photolithography at these feature sizes results in proximity effects contributing to CD budgets and dominating the CD control. One of the critical levels of the current generation ASIC devices is the polysilicon gate level containing a set of lines in nesting configurations ranging from dense to isolated. The optical proximity effects of such geometries are pitch-dependent. Thus the key challenge of the gate level exposure is CD control of the features nested on a wide range of pitches. The state-of-the-art photolithography tools used for critical level manufacture are equipped with a wide range of illumination options including conventional, small-sigma, and off-axis. These options expand the exposure capabilities of steppers and complicate the optimization of the photolithography. The complexity of the image formation, coupled with the number of stepper exposure options, vastly expands the parameter space of photolithography optimization. The optimization of the photolithography process has to take into consideration the requirements of IC manufacture. These requirements include the CD tolerance, the depth of focus and the exposure latitude. The numeric value of each represents statistical and systematic factors influencing the yield of manufacture as well as the CD tolerance reflecting the IC performance goals. Our goal was to optimize the CD performance of critical level i-line photolithography. Our strategy combined resist model simulation and proof-of-principle testing. We analyzed a set of features with the nominal, pitch-independent CDs. We analyzed the CD range of variation for different pitches characteristic for the polysilicon gate level. The analysis was performed for a wide range of illumination/exposure conditions representing capabilities of the state-of-the-art, commercial i-line steppers. To qualify the exposure options, we have developed a metric taking into consideration the requirements of IC manufacture. We conducted systematic studies of the CD range versus illumination and exposure conditions. As a result, we identified the exposure strategies leading to the range of CD variation meeting the tolerance requirements of the ASIC manufacture. A methodology combining the resist image simulation and limited resist testing allowed us to find quickly the optimum exposure strategy supportive of manufacturing requirements. It also resulted in a great reduction of resources required to conduct the process characterization and the CD metrology. We applied this methodology to optimize the exposure condition of a current generation ASIC polysilicon gate level. The optimization methodology was verified experimentally. This discussion presents examples of optimization solutions. The report reviews the results of the resist modeling simulation, and reviews the results of the proof-of-principle metrology. We compare the modeling and the metrology and draw conclusions on the quality of the models' predictions. We interpret the model results in terms of CD characteristics of the critical level features exposed and developed in the resist. Finally, we assess the value of anchored resist simulation as a predictor of the CD characteristics. !2
机译：摘要：随着ASIC制造朝着0.35微米的方向发展，光刻优化变得越来越复杂。采用这些特征尺寸的I线光刻技术会产生邻近效应，从而影响CD预算并主导CD控制。新一代ASIC器件的关键级别之一是多晶硅栅极级别，其中包含一组嵌套配置（从密集到隔离）的线。这种几何形状的光学邻近效应取决于间距。因此，栅级曝光的关键挑战是嵌套在宽间距上的特征的CD控制。用于临界水平制造的最先进的光刻工具配备了多种照明选择，包括常规，小西格玛和离轴照明。这些选项扩展了步进器的曝光能力，并使光刻的优化复杂化。图像形成的复杂性，加上步进曝光选项的数量，极大地扩展了光刻优化的参数空间。光刻工艺的优化必须考虑IC制造的要求。这些要求包括CD公差，聚焦深度和曝光范围。每个数字代表影响生产良率的统计和系统因素，以及反映IC性能目标的CD容差。我们的目标是优化临界水平i线光刻的CD性能。我们的策略结合了抗蚀剂模型模拟和原理验证测试。我们使用与音高无关的名义CD分析了一组功能。我们针对多晶硅栅级的不同间距特性分析了CD的变化范围。针对代表最先进的商用i-line步进器功能的各种照明/曝光条件进行了分析。为了确定曝光选项的资格，我们已经制定了一种度量标准，其中考虑了IC制造的要求。我们对CD范围相对于光照和曝光条件进行了系统研究。结果，我们确定了导致CD变化范围满足ASIC制造商的公差要求的曝光策略。结合了抗蚀剂图像模拟和有限抗蚀剂测试的方法使我们能够快速找到支持制造要求的最佳曝光策略。这也大大减少了进行过程表征和CD计量所需的资源。我们采用了这种方法来优化当前ASIC多晶硅栅极级的曝光条件。优化方法已通过实验验证。本讨论提供了优化解决方案的示例。该报告审查了抗蚀剂建模仿真的结果，并审查了原理证明计量学的结果。我们比较建模和度量衡，并得出有关模型预测质量的结论。我们用抗蚀剂中曝光和显影的临界能级特征的CD特性来解释模型结果。最后，我们评估锚固抗蚀剂模拟的价值，作为CD特性的预测指标。 ！2

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