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Effects of Iridium Oxide Thickness and Post Annealing Temperature on the Size and Density of Core-shell IrOx-based Nanocrystals of a Nonvolatile Memory Device

机译：氧化铱厚度和退火后温度对非易失性存储器件核壳IrOx基纳米晶体的尺寸和密度的影响

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摘要

The purpose of this study is to investigate the size and density of IrO_x nanocrystals with the conditions of two iridium oxide thicknesses under two post deposition annealing temperature treatments. Through the microstructural investigation, growing mechanism of IrO_x nanocrystals is well explained.

机译：这项研究的目的是研究在两个沉积后退火温度处理下两个氧化铱厚度条件下IrO_x纳米晶体的尺寸和密度。通过微观结构研究，很好地解释了IrO_x纳米晶体的生长机理。

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《Physics and technology of high-k materials 9》|2011年|p.115-119|共5页
会议地点 Boston MA(US);Boston MA(US)
作者
W. C.Li; J.R. Yang;
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作者单位

Department of Material Science Engineering, National Taiwan University, Taipei, Taiwan;

Department of Material Science Engineering, National Taiwan University, Taipei, Taiwan;

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原文格式 PDF
正文语种 eng
中图分类半导体技术;
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机译：非易失性闪存器件中嵌入SiO_2栅氧化物中的Ni-NiO_x核壳纳米晶体的存储特性
2. Impact of metal nano layer thickness on tunneling oxide and memory performance of core-shell iridium-oxide nanocrystals [J] . W. Banerjee, S. Maikap, T.-C. Tien, Journal of Applied Physics . 2011,第7期

机译：金属纳米层厚度对隧穿氧化物和核-壳铱氧化物纳米晶体存储性能的影响
3. Effects of charge storage dielectric thickness on hybrid gadolinium oxide nanocrystal and charge trapping nonvolatile memory [J] . Jer-Chyi Wang, Chih-Ting Lin, Chi-Feng Chang Current applied physics: the official journal of the Korean Physical Society . 2014,第3期

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4. Effects of Iridium Oxide Thickness and Post Annealing Temperature on the Size and Density of Core-shell IrO_x-based Nanocrystals of a Nonvolatile Memory Device [C] . W. C. Li, J. R. Yang International Symposium on High Dielectric Constant and Other Dielectric Materials for Nanoelectronics and Photonice . 2011

机译：氧化铱厚度和退火温度对非易失性存储装置的核心壳IRO_X纳米晶体尺寸和密度的影响
5. Engineering the nanocrystal floating gates for nonvolatile flash memory devices. [D] . Zhu, Yan. 2007

机译：设计用于非易失性闪存设备的纳米晶体浮栅。
6. Gadolinium oxide nanocrystal nonvolatile memory with HfO2/Al2O3 nanostructure tunneling layers [O] . Jer-Chyi Wang, Chih-Ting Lin, Chia-Hsin Chen 2012

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7. Annealing temperature dependence of capacitance-voltage characteristics in Ge-nanocrystal-based nonvolatile memory structures [O] . C. J. Park, H. Y. Cho, S. Kim, 2006

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8. Effects of Heavy Ion Exposure on Nanocrystal Nonvolatile Memory [R] . Oldham, T. R. , Suhail, M. , Kuhn, P. , 2004

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Effects of Iridium Oxide Thickness and Post Annealing Temperature on the Size and Density of Core-shell IrOx-based Nanocrystals of a Nonvolatile Memory Device

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