A SIMPLE METHOD TO MODEL NONRECTANGULAR-GATE LAYOUT IN SOI MOSFETS

机译：SOI MOSFET非矩形栅极布局建模的简单方法

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A simple method to obtain an analytical current model for nonrectangular-gate layout in SOI MOSFETs is presented, based on partition of the original layout into trapezoidal parts, and modeling these trapezoids by a closed form expression. A generic shape factor is defined for comparison between devices of different shapes in the same technology. Three-dimensional simulation and some experimental results were carried out to verify the method accurateness. The obtained expression showed good agreement both to simulation and experimental results. The method can be applied to a wide range of gate layout shapes.

机译：提出了一种基于SOI MOSFET中非矩形栅极布局的分析电流模型的简单方法，该方法基于将原始布局划分为梯形部分，并通过闭合形式的表达式对这些梯形进行建模。定义了通用形状因数，以便在同一技术中不同形状的设备之间进行比较。进行了三维仿真和一些实验结果，验证了该方法的准确性。得到的表达式与仿真和实验结果均显示出良好的一致性。该方法可以应用于各种浇口布局形状。

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《Proceedings vol.2005-08; International Symposium on Microelectronics Technology and Devices(SBMICRO 2005); 200509;》|2005年|P.472-481|共10页
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作者
Renato Giacomini; Joao Antonio Martino;
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作者单位

Centro Universitario da FEI Av. H. de A. Castelo Branco, 3972. S. B.do Campo - SP. ZIP: 09850-901. Brazil;

Laboratorio de Sistemas Integraveis, Universidade de Sao Paulo Av. Prof. Luciano Gualberto Trav.3 N.158. Sao Paulo- SP. ZIP:05508-900. Brazil;

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原文格式 PDF
正文语种 eng
中图分类微电子学、集成电路（IC）;
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1. A simple modelling of device speed in double-gate SOI MOSFETs [J] . K. Rajendran, G. Samudra Microelectronics journal . 2000,第4期

机译：双栅极SOI MOSFET中器件速度的简单建模
2. Characterization and modelling of layout effects in SiGe channel pMOSFETs from 14 nm UTBB FDSOI technology [J] . Berthelon R., Andrieu F., Ortolland S., Solid-State Electronics . 2017,第FEBa期

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3. Application, modeling and limitations of Y-function based methods for massive series resistance in nanoscale SOI MOSFETs [J] . A. Karsenty, A. Chelly Solid-State Electronics . 2014,第feba期

机译：基于Y函数的纳米SOI MOSFET大规模串联电阻方法的应用，建模和局限性
4. A SIMPLE METHOD TO MODEL NONRECTANGULAR-GATE LAYOUT IN SOI MOSFETS [C] . Renato Giacomini, Joao Antonio Martino International Symposium on Microelectronics Technology and Devices . 2005

机译：SOI MOSFET中非连接 - 栅极布局的简单方法
5. Heat flow modeling of SOI MOSFETs and circuits [D] . Yu, Feixia. 2004

机译：SOI MOSFET和电路的热流建模
6. Aspect Ratio Model for Radiation-Tolerant Dummy Gate-Assisted n-MOSFET Layout [O] . Min Su Lee, Hee Chul Lee 2014

机译：耐辐射的虚拟栅极辅助n-MOSFET布局的长宽比模型
7. Intrinsic Nonlinearities and Layout Impacts of 100 V Integrated Power MOSFETs in Partial SOI Process [O] . Fan Lin, Knott Arnold, Jørgensen Ivan Harald Holger 2016

机译：部分sOI工艺中100 V集成功率mOsFET的本征非线性和布局影响

A SIMPLE METHOD TO MODEL NONRECTANGULAR-GATE LAYOUT IN SOI MOSFETS

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