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Heat flow modeling of SOI MOSFETs and circuits

机译：SOI MOSFET和电路的热流建模

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摘要

Despite many advantages of the Silicon-On-Insulator (SOI) Complementary Metal Oxide Semiconductor (CMOS) technology over the conventional bulk CMOS technology, such as immunity of latch-up, high transconductance, and reduced parasitic source and drain capacitance, self-heating in SOI structure induced by the buried oxide (BOX) has been one of the most serious problems that prevent the further advance of the SOI technology. Self-heating substantially enhances temperature and temperature gradients in SOI devices and integrated circuits (IC's) and results in evident degradation of SOI performance and reliability. Accurate models for heat flow in SOI devices and interconnects are thus crucial for prediction and improvement of SOI performance and reliability.;To improve the exiting thermal models of SOI devices, physics-based analytical heat flow models for SOI devices and interconnects were developed using the SOI Silicon film thermal resistance, instead of the traditional SOI channel thermal resistance, to describe heat loss to the oxide and substrate. Unlike the conventional approach to thermal modeling of SOI devices that assumes constant channel temperature, the developed model is able to account for the temperature variation of the silicon thin island in SOI devices including the peak temperature in the channel and the electrode temperatures. The device failure rate is mainly described by the peak temperature instead of the average channel temperature given by the conventional SOI thermal circuit used in the SOI industry. Since most of the heat dissipated in the channel flows out through the interconnects rather than directly down to the substrate through the oxide, the temperature of the electrodes, which are the terminals of the interconnects, are important to account for the heat exchange among devices. When the interconnect length is larger than the interconnect thermal characteristic length, heat loss to the oxide from the interconnect needs to be considered. The developed model can also provide the temperature profile in the interconnect, accounting for heat loss to the oxide, which could be used for the reliability analysis of the SOI integrated circuits. Models with different levels of precision and efficiency were also developed to meet the requirement as a tradeoff between the detailed thermal information and CPU time.;The developed analytical thermal models were finally incorporated into the SPICE circuit simulator to study simple SOI current mirror structures and a CMOS differential amplifier. With the circuit layout information provided, electro-thermal simulations were performed to investigate the thermal influence on electrical characteristics of circuits taking into account SOI self-heating effects. Our study suggests that BSIMSOI cannot estimate the thermal coupling in the circuits accurately due to its incorrect electrode temperatures. The models developed in this study, coupled with the circuit simulator, provide an efficient approach to obtain accurate temperature distributions in devices and interconnects of the SOI circuits, which offer crucial information for reliability analysis of SOI devices and interconnects.
机译：尽管绝缘体上硅（SOI）互补金属氧化物半导体（CMOS）技术比常规体CMOS技术具有许多优势，例如具有抗闩锁性，高跨导性以及减少的寄生源极和漏极电容，自发热掩埋氧化物（BOX）引起的SOI结构中的SOI一直是阻碍SOI技术进一步发展的最严重的问题之一。自加热会大大提高SOI器件和集成电路（IC）中的温度和温度梯度，并导致SOI性能和可靠性明显下降。因此，准确的SOI器件和互连中的热流模型对于预测和提高SOI性能和可靠性至关重要。为了改善SOI器件的现有热模型，开发了基于物理学的SOI器件和互连的热分析模型。 SOI硅膜热阻代替了传统的SOI通道热阻，用来描述氧化物和衬底的热损失。与假设通道温度恒定的传统SOI器件热建模方法不同，开发的模型能够考虑SOI器件中硅薄岛的温度变化，包括通道中的峰值温度和电极温度。器件故障率主要由峰值温度而不是由SOI行业中使用的常规SOI热电路给出的平均通道温度来描述。由于通道中耗散的大部分热量通过互连线流出，而不是通过氧化物直接流到基板，因此，作为互连线端子的电极温度对于解决器件之间的热交换很重要。当互连长度大于互连热特性长度时，需要考虑从互连到氧化物的热损失。所开发的模型还可以提供互连中的温度曲线，从而考虑到氧化物的热损失，可以将其用于SOI集成电路的可靠性分析。还开发了具有不同精度和效率水平的模型，以满足在详细的热信息和CPU时间之间进行权衡的要求。最终将开发的解析热模型并入SPICE电路仿真器中，以研究简单的SOI电流镜结构和CMOS差分放大器。利用所提供的电路布局信息，进行了电热仿真，以考虑SOI自热效应来研究热对电路电气特性的影响。我们的研究表明，由于电极温度不正确，BSIMSOI无法准确估计电路中的热耦合。本研究中开发的模型与电路仿真器一起，提供了一种有效的方法来获得SOI电路的器件和互连中的准确温度分布，这为SOI器件和互连的可靠性分析提供了关键信息。

著录项

  • 作者

    Yu, Feixia.;

  • 作者单位

    Clarkson University.;

  • 授予单位 Clarkson University.;
  • 学科 Electrical engineering.
  • 学位 Ph.D.
  • 年度 2004
  • 页码 85 p.
  • 总页数 85
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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