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Characterisation of the Corner Effect by composed 2D Device Simulations

机译:通过组合的2D设备仿真来表征转角效应

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In scaled down MOSFET's isolated by trenches the threshold voltage is dominated by the corner effect. In this work a method is presented which allows to compose the gate characteristic of corner devices from 2D simulations. The composed results are compared with 3D simulations. The method has been applied successfully for gate lengths and gate widths down to .4μm and for bulk voltages down to -3.3V (nMOSFET). In cases where no shoulder is observed in the gate characteristic the presence of the corner effect can be identified by the comparison of 2D and composed results without expansive 3D simulations.
机译:在由沟槽隔离的按比例缩小的MOSFET中,阈值电压受拐角效应控制。在这项工作中,提出了一种方法,该方法可以根据2D模拟来组合角设备的门控特性。将合成的结果与3D仿真进行比较。该方法已成功应用于栅极长度和栅极宽度低至.4μm以及体积电压低至-3.3V(nMOSFET)的应用。如果在浇口特性中未观察到肩部,则可以通过比较2D和合成结果来确定拐角效应的存在,而无需进行广泛的3D模拟。

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