Testing for Transistor Aging

机译：测试晶体管老化

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Transistor aging results in circuit delay degradation over time,and is a growing concern for future systems. On-line circuit failure prediction, together with on-line self-test, can overcome transistor aging challenges for robust systems with built-in self-healing. Effective circuit failure prediction requires very thorough testing to estimate the amount of aging in various parts of a large design during system operation. This paper introduces such testing techniques. Results on large designs demonstrate the practicality and effectiveness of presented techniques.

机译：晶体管的老化会导致电路延迟随着时间的流逝而退化，并且对于未来的系统越来越引起关注。在线电路故障预测以及在线自测试可以克服具有内置自修复功能的强大系统的晶体管老化挑战。有效的电路故障预测需要非常彻底的测试，以估计系统运行期间大型设计各个部分的老化量。本文介绍了这种测试技术。大型设计的结果证明了所提出技术的实用性和有效性。

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来源
《VLSI Test Symposium, 2009. VTS '09》|2009年|215-220|共6页
会议地点 Santa Cruz CA(US);Santa Cruz CA(US)
作者
Baba A.H.; Mitra S.;
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Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA;

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active networks; ageing; automatic testing; combinational circuits; delays; integrated circuit design; integrated circuit reliability; transistor circuits; circuit delay degradation; online circuit failure prediction; online self test; transistor aging; Delay tests; Failure prediction; path selection; test pattern generation;

机译：有源网络;老化;自动测试;组合电路;延迟;集成电路设计;集成电路可靠性;晶体管电路;电路延迟降级;在线电路故障预测;在线自检;晶体管老化;延迟测试;故障预测;路径选择;测试模式生成;

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1. Analysis of the Results of Accelerated Aging Tests in Insulated Gate Bipolar Transistors [J] . Daniel Astigarraga, Federico Martin Ibanez, Ainhoa Galarza, IEEE Transactions on Power Electronics . 2016,第11期

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2. Excellent Stability of GaN-on-Si High Electron Mobility Transistors with 5 μm Gate-drain Spacing Tested in Off-State at a Record drain Voltage of 200 V and 200 ℃ [J] . Denis Marcon, Marleen Van Hove, Domenica Visalli, Japanese journal of applied physics . 2010,第4issue2期

机译：GaN-on-Si高电子迁移率晶体管具有5μm栅极-漏极间距的出色稳定性，该栅极漏极间距在200 V和200℃的创纪录漏极电压下在截止状态下进行了测试
3. Simple mathematical model of shift of threshold voltage induced in an m.o.s. transistor by testing at elevated temperatures [J] . Reynolds F.H. Electrical Engineers, Proceedings of the Institution of . 1972,第12期

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4. Experimental study of 600V GaN transistor under the short-circuit aging tests [C] . J-Z. Fu, F. Fouquet, M. Kadi, Mediterranean Electrotechnical Conference . 2018

机译：600V GaN晶体管短路老化试验的实验研究
5. Design, Testing, and Modeling of Radio Frequency and Digital Circuits Using Metal-Ferroelectric-Semiconductor Field-Effect Transistors [D] . Hunt, Mitchell Ryan. 2020

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6. Accelerated Tests on Si and SiC Power Transistors with Thermal Fastand Ultra-Fast Neutrons [O] . Fabio Principato, Saverio Altieri, Leonardo Abbene, 2020

机译：带有热快和超快中子的Si和SiC功率晶体管的加速测试
7. Radiation Damage Testing Of Transistors For SSC Front-end Electronics [O] . J. Dawson, T. Ekenberg, A. Stevens, -1

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8. Bipolar Transistor and Diode Failure to Electrical Transients--Predictive Failure Modeling versus Experimental Damage Testing. 2. AFWL Transistor and Diode Failure Model [R] . Vrabel, M. J. 1981

机译：双极晶体管和二极管电瞬态失效 - 预测失效模型与实验损伤测试。 2. aFWL晶体管和二极管失效模型

Testing for Transistor Aging

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