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A CMOS front end for high linearity zero-IF WCDMA receiver .

机译：高线性度零中频WCDMA接收器的CMOS前端。

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摘要

This dissertation presents a single mode direct conversion receiver architecture and the corresponding CMOS front-end for low power consumption, small form factor, low noise figure and high linearity wide band code division multiple access (WCDMA) receiver in a TSMC 0.18-microm process. The front end comprises a novel differential low noise amplifier (LNA) and a novel down-conversion mixer. One of the major advantages of differential LNAs is that they are much less susceptible to common mode injected noise such as substrate noise. This is a very important issue in cases where the LNA is to be integrated with digital circuits that may generate in-band noise and interference. Also the leakage problem, where signals such as the LO couples to the antenna through the LNA input port, may be greatly alleviated by use of differential circuits. The proposed LNA has dual gain mode; low gain mode (LGM) and high gain mode (HGM). The variable gain LNA reduces the dynamic range requirement for the succeeding stages and also reduces the required gain of the baseband filter (BBF). The proposed down-conversion I/Q mixer structure is chosen to be a differential double balanced mixer for its inherited insensitivity to LO-IF isolation. It also suppresses common-mode substrate noise and interference. Also, this proposed topology reduces the power by up to 50 percent compared to a conventional down-conversion mixer. The undesired bondwire and package parasitics such as capacitors, inductors, and resistors are taken into account during the schematic design and layout. These undesired parasitics may affect the gain response and input impedance matching of the LNA and the gain and phase mismatch of the mixer. The proposed RF front-end is simulated with the Cadence SpectreRF simulator. Although it shows the degradation of the gain and the input impedance to some extent, the proposed front-end shows high linearity, low noise figure, very low corner frequency in the flicker noise, negligible gain mismatch and low power dissipation at 2 GHz frequency band.
机译：本文提出了一种单模直接转换接收机架构和相应的CMOS前端，以台积电（TSMC）0.18微米工艺实现低功耗，小尺寸，低噪声系数和高线性度的宽带码分多址（WCDMA）接收机。前端包括新颖的差分低噪声放大器（LNA）和新颖的下变频混频器。差分LNA的主要优点之一是，它们不易受共模注入噪声（例如衬底噪声）的影响。在LNA与可能产生带内噪声和干扰的数字电路集成的情况下，这是一个非常重要的问题。同样，通过使用差分电路，可以大大减轻泄漏问题，例如LO信号通过LNA输入端口耦合到天线。拟议的低噪声放大器具有双增益模式；低增益模式（LGM）和高增益模式（HGM）。可变增益LNA降低了后续级的动态范围要求，还降低了基带滤波器（BBF）的所需增益。拟议的下变频I / Q混频器结构因其对LO-IF隔离的固有敏感性而被选择为差分双平衡混频器。它还抑制了共模基板噪声和干扰。而且，与传统的下变频混频器相比，这种拟议的拓扑结构可将功耗降低多达50％。在进行原理图设计和布局时，应考虑到不希望的键合线和封装寄生现象，例如电容器，电感器和电阻器。这些不希望有的寄生效应可能会影响LNA的增益响应和输入阻抗匹配以及混频器的增益和相位不匹配。建议的RF前端使用Cadence SpectreRF仿真器进行仿真。尽管提出的前端显示出增益和输入阻抗的一定程度的下降，但其前端显示出高线性度，低噪声系数，闪烁噪声中的转折频率非常低，可忽略的增益失配以及2 GHz频段的低功耗。

著录项

  • 作者

    Alam, Shaikh Md. Khairul.;

  • 作者单位

    The Ohio State University.;

  • 授予单位 The Ohio State University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2006
  • 页码 p.5928
  • 总页数 161
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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