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Compact Models and the i-MOS Platform Developments for the Tunneling Field-Effect Transistor Technology.

机译:隧道场效应晶体管技术的紧凑模型和i-MOS平台开发。

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摘要

Tunneling field-effect transistors (TFETs) based on the quantum interband tunneling are under extensive research. They provide one promising solution for the CMOS power problem due to the fast switching property with sub-60mV/dec subthreshold swing. Experimental studies on the TFETs structures and materials have been reported in literatures. However, the infrastructure for the research and developments of the TFETs technology is incomplete due to the lack of the electronic design automation (EDA) tools which support the TFETs based integrated circuit simulations and designs. This thesis is focused on developing the compact models and the i-MOS platform to fulfill the gap between the TFETs device and circuit designs.;A compact model for TFETs with double-gate and nanowire configurations is developed in this thesis. With understandings of TFETs operations, unique properties of TFETs and their geometry dependences are identified. The source depletions and channel inversions responsible for the sub-60mV/dec subthreshold swing and the exponential segment in the output curves of TFETs are considered. A closed form solution of the tunneling current is proposed, capturing the main device physics as well as reducing the computation complexity based on SPICE simulation considerations. A 100/0 channel charge partition scheme is proved based on which the terminal charge model is formulated to describe the capacitance characteristics. The geometry dependences of the double-gate and nanowire TFETs characteristics are reproduced by the compact model. The diffusive transport in TFETs is modeled by the proposed drain-FET method and source-resistance method. TFETs with the uniaxial strain engineering are also accounted for by combining the compact model and tight-binding simulations of material properties.;To assist the TFETs based circuit designs, the i-MOS platform which serves the purpose of an EDA tool for the TFETs technology is developed. With an internet browser as the user interface, the i-MOS provides services from single device simulations, parameter extractions to circuit simulations. It is powered by the tailored open source Ngspice with the developed TFET model implemented. The web-based simulation system is constructed with the efficiently linked server side and client side programs. Simulations of TFETs based logic gates on i-MOS are demonstrated.
机译:基于量子带间隧穿的隧穿场效应晶体管(TFET)正在进行广泛的研究。由于具有低于60mV / dec的亚阈值摆幅的快速开关特性,它们为CMOS功率问题提供了一种有前途的解决方案。在文献中已经报道了关于TFET的结构和材料的实验研究。但是,由于缺乏支持基于TFET的集成电路仿真和设计的电子设计自动化(EDA)工具,用于TFET技术研究和开发的基础设施不完整。本文的重点是开发紧凑型模型和i-MOS平台,以弥补TFET器件与电路设计之间的空白。;本文针对双栅极和纳米线配置的TFET紧凑型模型进行了开发。通过了解TFET的操作,可以确定TFET的独特属性及其几何形状相关性。考虑了造成TFET输出曲线中低于60mV / dec的亚阈值摆幅和指数段的源极耗尽和沟道反转。提出了一种隧道电流的封闭形式解决方案,该方案捕获了主要器件的物理特性,并基于SPICE仿真考虑降低了计算复杂性。证明了一种100/0通道的电荷分配方案,在该方案的基础上制定了用于描述电容特性的终端电荷模型。紧凑型模型再现了双栅极和纳米线TFET特性的几何形状相关性。通过提出的漏极FET方法和源极电阻方法对TFET中的扩散传输进行建模。通过将紧凑模型和材料特性的紧密绑定模拟相结合,也可以算出具有单轴应变工程的TFET。为了协助基于TFET的电路设计,i-MOS平台可为TFET技术提供EDA工具被开发。通过Internet浏览器作为用户界面,i-MOS提供了从单个设备仿真,参数提取到电路仿真的服务。它由量身定制的开源Ngspice驱动,并实现了开发的TFET模型。基于Web的仿真系统由高效链接的服务器端和客户端程序构成。演示了在i-MOS上基于TFET的逻辑门的仿真。

著录项

  • 作者

    Zhang, Lining.;

  • 作者单位

    Hong Kong University of Science and Technology (Hong Kong).;

  • 授予单位 Hong Kong University of Science and Technology (Hong Kong).;
  • 学科 Engineering Electronics and Electrical.;Engineering Computer.
  • 学位 Ph.D.
  • 年度 2013
  • 页码 173 p.
  • 总页数 173
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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