Silicon carbide is a wide band gap material that is well suited for the production of power electronic devices. Making SiC devices that can meet the ever increasing demands of today's technology requires the development of device designs and processing methods that can address the many challenges of this material. The objective of this research was to further the practical viability of SiC by developing edge termination processes and methods that can effectively prevent premature device breakdown while keeping fabrication costs down. In particular, techniques for applying beveled sidewall termination to small scale SiC devices were sought for mesa isolated devices while an improved design for an ion implanted junction termination extension was sought for planar devices. Building a system for plasma etching SiC was first necessary for the pursuit of sidewall beveling techniques.; A very basic plasma etching system was designed and built. Parameters including rf power, gas flow, and pressure were tuned to produce SiC etch rates high enough to practically etch several microns of SiC while giving good mask selectivity and etched surface quality. Several different mask materials were also investigated along with the effects of sample preparation on the quality of the etch field. This etching system was used for many essential device fabrication steps as well as for the beveled sidewall edge termination techniques presented herein.; Four layer, three terminal thyristors and p-n diodes were successfully fabricated on 4H-SiC. Edge termination techniques were investigated to increase the performance of these devices. Beveled sidewall termination for small area SiC devices was achieved through the development of novel techniques using photoresist masks during plasma etching. P-n junction diodes were fabricated and tested using a technique that creates beveled sidewalls with very small angles measured from horizontal. The effect of two different ranges of bevel angles on reverse breakdown voltage were compared.; A variation of another existing edge termination called a junction termination extension (JTE) was developed and tested on planar implanted anode p-n diodes. This new edge termination, named the graded junction termination extension (GJTE), uses a sloped ion implantation mask to produce a self-aligned JTE with a graded dopant concentration and depth. Devices terminated with the GJTE had breakdown voltages that averaged 2.5 times higher than those of control devices having no edge termination.
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