随着软件无线电数字通信系统的应用,使用大规模可编程器件FPGA的技术成为数字通信系统研究的热点.在高精度BDPSK系统中,基于传统Costas环的载波提取会占用FPGA器件的较大资源,采用改进的Costas环进行载波同步提取,节省了较多乘法器和加法器,提高了载波提取的运算速度.基于改进Costas环设计的14位数据端高精度BDPSK数字通信收发系统,将所有基本的单元器件集成在一块可编程FPGA芯片上,提高了系统的集成度,增加了电路的可靠性.同时,系统参数及输出数据位宽均可通过编程调整.这种可编程的数字通信系统具有良好的应用前景.%With the development of software-defined radio digital communication systems,taking the field-programmable gate array (FPGA) as the control core has become a hotspot of the study on digital communication systems.In a high precision BDPSK communication system,the traditional way of acquiring a carrier based on the Costas loop can consume a large number of resources of FPGA devices.We introduce an improved Costas loop structure which can reduce the number of multipliers and adders and improve operation speed.In this 14-bit high precision intermediate frequency transmitting-receiving system,all basic units are integrated on a single FPGA chip,which can improve the integration degree of the system and its reliability.Meanwhile,all parameters and output data width of the system are programmable,which has good application prospects.
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