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首页> 外文期刊>Circuits, systems, and signal processing >A State-of-the-Art Current Mirror-Based Reliable Wide Fan-in FinFET Domino OR Gate Design
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A State-of-the-Art Current Mirror-Based Reliable Wide Fan-in FinFET Domino OR Gate Design

机译：基于最新电流镜的可靠宽扇入FinFET Domino或门设计

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With continued scaling of VLSI circuits, reliability has emerged out as one of the major circuit design challenges. Systematic die-to-die, random on-die as well as temperature and supply voltage variations are major sources of performance degradation which leads to unreliable circuits. Further, with reduced short channel effects at highly scaled nodes, the FinFET has recently been emerged as a suitable replacement of CMOS in the VLSI industry. Wide fan-in FinFET domino logic OR gate is one such circuit, which serves as an integral part of register file in a high-speed FinFET microprocessor. This circuit inherently suffers from low noise immunity which get worsens with circuit parameter variations due to process and temperature variations. At highly scaled technology nodes, it has been studied that the effects of on-die random process variation surpass the effects of systematic variations. Furthermore, at deep sub-nanometer scale the effect of process variation on device parameters is higher in FinFET as compared to CMOS. In this research work a reliable current mirror-based wide fan-in FinFET domino OR gate is proposed for temperature, random on-die and systematic die-to-die process variation tolerance. Simulation results at 32 nm FinFET process show that the proposed design is capable of maintaining high noise immunity (Unity Noise Gain of nearly 0.4 V) at all process corners and a constant performance (with reduced delay by 30% as compared to conventional design) in the presence of systematic as well as random process and temperature variations.
机译：随着VLSI电路规模的不断扩大，可靠性已成为主要的电路设计挑战之一。系统的管芯到管芯，随机的管芯以及温度和电源电压变化是性能下降的主要原因，这会导致电路不可靠。此外，由于在高度扩展的节点上减少了短通道效应，FinFET最近已成为VLSI行业中CMOS的合适替代产品。宽扇入式FinFET多米诺骨牌逻辑OR门就是这样一种电路，它用作高速FinFET微处理器中寄存器文件的组成部分。该电路固有地具有低抗扰性，随着工艺和温度的变化，电路参数的变化会使其恶化。在高度扩展的技术节点上，已经研究到管芯上随机过程变化的影响超过系统变化的影响。此外，在深亚纳米级，与CMOS相比，FinFET中工艺变化对器件参数的影响更大。在这项研究工作中，提出了一种可靠的基于电流镜的宽扇入式FinFET多米诺骨牌或门，以实现温度，随机芯片上和系统芯片到芯片工艺变化的容限。在32 nm FinFET工艺上的仿真结果表明，所提出的设计能够在所有工艺拐角处保持较高的抗噪能力（单位噪声增益接近0.4 V），并具有恒定的性能（与传统设计相比，延迟减少了30％）。系统以及随机过程和温度变化的存在。

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