Three-transistor one-time programmable (OTP) ROM cell array using standard CMOS gate oxide antifuse

Jinbong Kim; Kwyro Lee

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Three-transistor one-time programmable (OTP) ROM cell array using standard CMOS gate oxide antifuse

机译：使用标准CMOS栅极氧化物反熔丝的三晶体管一次性可编程（OTP）ROM单元阵列

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摘要

A three-transistor (3-T) cell CMOS one-time programmable (OTP) ROM array using CMOS antifuse (AF) based on permanent breakdown of MOSFET gate oxide is proposed, fabricated and characterized. The proposed 3-T OTP cell for ROM array is composed of an nMOS AF, a high-voltage blocking nMOS, and cell access transistor, all compatible with standard CMOS technology. The experimental results show that the proposed structure can be a viable technology option of high-density CMOS OTP ROM array for modern digital as well as analog circuits.

机译：提出了一种基于MOSFET栅极氧化层永久击穿的三晶体管（3-T）单元CMOS一次性可编程（OTP）ROM阵列，该阵列使用了CMOS反熔丝（AF）。提议的用于ROM阵列的3-T OTP单元由nMOS AF，高压阻挡nMOS和单元访问晶体管组成，所有这些器件均与标准CMOS技术兼容。实验结果表明，该结构可以作为现代数字电路和模拟电路的高密度CMOS OTP ROM阵列的可行技术选择。

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来源
《IEEE Electron Device Letters》 |2003年第9期|p.589-591|共3页
作者
Jinbong Kim; Kwyro Lee;
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作者单位

Dept. of Electr. Eng. & Comput. Sci., KAIST, South Korea;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
中图分类无线电电子学、电信技术;
关键词
CMOS memory circuits; semiconductor device breakdown; PROM; three-transistor one-time programmable ROM cell array; CMOS gate oxide antifuse; MOSFET gate oxide breakdown; high-voltage blocking nMOS; cell access transistor;

机译：CMOS存储电路;半导体器件击穿;舞会;三晶体管一次性可编程ROM单元阵列;CMOS栅极氧化物反熔丝;MOSFET栅极氧化物击穿;高压阻挡nMOS;单元存取晶体管;

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专利

1. A 32-KB Standard CMOS Antifuse One-Time Programmable ROM Embedded in a 16-bit Microcontroller [J] . Hyouk-Kyu Cha, Ilhyun Yun, Jinbong Kim, IEEE Journal of Solid-State Circuits . 2006,第9期

机译：嵌入16位微控制器的32KB标准CMOS反熔丝一次性可编程ROM
2. A 4 kb Metal-Fuse OTP-ROM Macro Featuring a 2 V Programmable 1.37 m 1T1R Bit Cell in 32 nm High-k Metal-Gate CMOS [J] . Kulkarni S. H., Chen Z., He J., Solid-State Circuits, IEEE Journal of . 2010,第4期

机译：一个4 kb金属熔丝OTP-ROM宏，在32 nm High-k Metal-Gate CMOS中具有2 V可编程1.37 m 1T1R位单元
3. Antifuse OTP Cell in a Cross-Point Array by Advanced CMOS FinFET Process [J] . Kuo Ren-Jay, Chang Fu-Cheng, King Ya-Chin, IEEE Transactions on Electron Devices . 2019,第4期

机译：通过先进的CMOS FinFET工艺在交叉点阵列中使用反熔丝OTP单元
4. 3-Transistor antifuse OTP ROM array using standard CMOS process [C] . Jinbong Kim, Kwyro Lee . 2003

机译：采用标准CMOS工艺的三晶体管反熔丝OTP ROM阵列
5. Submicron CMOS programmable analog floating-gate circuits and arrays using DC-DC converters. [D] . Hooper, Mark S. 2005

机译：使用DC-DC转换器的亚微米CMOS可编程模拟浮栅电路和阵列。
6. Microhotplates for Metal Oxide Semiconductor Gas Sensor Applications—Towards the CMOS-MEMS Monolithic Approach [O] . Haotian Liu, Li Zhang, King Ho Holden Li, 2018

机译：用于金属氧化物半导体气体传感器的微孔板—迈向CMOS-MEMS单片方法
7. Three-Transistor One-Time Programmable (OTP) ROM Cell Array Using Standard CMOS Gate Oxide Antifuse [O] . Jinbong Kim, Kwyro Lee, Senior Member 2015

机译：采用标准CmOs栅极氧化物反熔丝的三晶体管一次性可编程（OTp）ROm单元阵列
8. Characterization of Sandia Laboratories Expanded Linear Array Silicon Gate CMOS Standard Cells [R] . Antinone, R. J., Alexander, D. R., Brown, G. W. 1980

机译：桑迪亚实验室扩展线阵硅门CmOs标准单元的特性

Three-transistor one-time programmable (OTP) ROM cell array using standard CMOS gate oxide antifuse

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