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首页> 外文期刊>European transactions on telecommunications >Effects of Fixed Frequency Clock Offsets in Synchronous Digital Hierarchy Networks
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Effects of Fixed Frequency Clock Offsets in Synchronous Digital Hierarchy Networks

机译：固定频率时钟偏移在同步数字体系网络中的作用

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摘要

SDH networks require synchronous clocking in order to minimize network wander and jitter. In practice, the clocks in SDH networks are not ideal and thus are not all perfectly synchronous. The operation of SDH networks with non-ideal clocks results in undesirable wander and jitter effects. Two different philosophies are being used to minimize these undesirable synchronization effects in SDH networks. In Europe, where it is difficult to tighten clock specifications due to the multinational synchronization environment, desynchronizer designs are made more robust. In North America, where Synchronous Optical Network (SONET) is used, the specifications of both the clocks and the synchronization distribution are being tightened. Even with these different approaches, non-ideal synchronization effects still exist in SDH networks. In particular, the STM-N, AU, and TU overhead bytes cause gapped pointer effects when traditional fixed threshold pointer processors are used. Another type of pointer processor, a uniform pointer processor, can remove the gapped pointer effects caused by the STM-N, AU, and TU overhead bytes. Additionally, a compensating desynchronizer may be used to remove the gapped effects caused by the VC overhead bytes. If these gapped effects are not removed, then they cause jitter and wander in a reconstructed PDH signal. This paper focuses on the case where the SDH network clocks have fixed frequency offsets. An El-rate (2048 kbit/s) payload, which is transported over a network consisting of SDH and PDH islands, is used to show the effects of this non-ideal clocking in SDH networks. In theory, clock frequency differences in SDH networks are accommodated by the pointer processor mechanism without slips (i.e. losing or repeating data). In practice, non-ideal synchronization may still cause slips.
机译：SDH网络需要同步时钟，以最大程度地减少网络漂移和抖动。实际上，SDH网络中的时钟不是理想的，因此并非都完全同步。具有非理想时钟的SDH网络的操作会导致不良的漂移和抖动影响。两种不同的哲学被用于使SDH网络中的这些不良同步效应最小化。在欧洲，由于跨国同步环境而难以收紧时钟规格，因此，去同步器的设计更加坚固。在北美，使用同步光网络（SONET）时，时钟和同步分配的规范都越来越严格。即使采用这些不同的方法，SDH网络中仍然存在非理想的同步效果。特别是，当使用传统的固定阈值指针处理器时，STM-N，AU和TU开销字节会导致间隙指针效应。指针处理器的另一种类型，即统一指针处理器，可以消除由STM-N，AU和TU开销字节引起的间隙指针影响。另外，可以使用补偿去同步器来消除由VC开销字节引起的间隙效应。如果未消除这些间隙效应，则它们会导致抖动并在重建的PDH信号中漂移。本文重点介绍SDH网络时钟具有固定频率偏移的情况。在由SDH和PDH岛组成的网络上传输的El-rate（2048 kbit / s）有效负载用于显示SDH网络中这种非理想时钟的影响。从理论上讲，指针处理器机制可适应SDH网络中的时钟频率差异，而不会产生滑动（即丢失或重复数据）。在实践中，不理想的同步仍可能导致滑动。

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