...
首页> 外文期刊>Biomedical Circuits and Systems, IEEE Transactions on >Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor
【24h】

Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor

机译:具有增强的噪声效率因子的高能效低噪声神经记录放大器

获取原文
获取原文并翻译 | 示例
           

摘要

This paper presents a neural recording amplifier array suitable for large-scale integration with multielectrode arrays in very low-power microelectronic cortical implants. The proposed amplifier is one of the most energy-efficient structures reported to date, which theoretically achieves an effective noise efficiency factor (NEF) smaller than the limit that can be achieved by any existing amplifier topology, which utilizes a differential pair input stage. The proposed architecture, which is referred to as a partial operational transconductance amplifier sharing architecture, results in a significant reduction of power dissipation as well as silicon area, in addition to the very low NEF. The effect of mismatch on crosstalk between channels and the tradeoff between noise and crosstalk are theoretically analyzed. Moreover, a mathematical model of the nonlinearity of the amplifier is derived, and its accuracy is confirmed by simulations and measurements. For an array of four neural amplifiers, measurement results show a midband gain of 39.4 dB and a $-$3-dB bandwidth ranging from 10 Hz to 7.2 kHz. The input-referred noise integrated from 10 Hz to 100 kHz is measured at 3.5 $mu{rm V}_{rms}$ and the power consumption is 7.92 $mu$W from a 1.8-V supply, which corresponds to NEF $=$ 3.35. The worst-case crosstalk and common-mode rejection ratio within the desired bandwidth are $-$ 43.5 dB and 70.1 dB, respectively, and the active silicon area of each amplifier is $256 mu{hbox {m}}times 256 mu$m in 0.18- $mu$m complementary metal–oxide semiconductor technology.
机译:本文提出了一种神经记录放大器阵列,适用于超低功耗微电子皮质植入物中与多电极阵列的大规模集成。拟议的放大器是迄今为止报道的最节能的结构之一,理论上实现的有效噪声效率因子(NEF)小于使用差分对输入级的任何现有放大器拓扑所能达到的极限。所提出的架构,即所谓的部分运算跨导放大器共享架构,除了极低的NEF外,还导致功耗和硅面积的显着减少。理论上分析了失配对通道间串扰的影响以及噪声与串扰之间的折衷。此外,推导了放大器非线性的数学模型,并通过仿真和测量证实了其准确性。对于四个神经放大器组成的阵列,测量结果显示,中频带增益为39.4 dB,带宽为$-$ 3-dB,范围为10 Hz至7.2 kHz。在10 Hz至100 kHz积分的输入参考噪声的测量值为3.5 $ mu {rm V} _ {rms} $,1.8V电源的功耗为7.92 $ mu $ W,与NEF $ = $ 3.35。在所需带宽内,最坏情况下的串扰和共模抑制比分别为$-$ 43.5 dB和70.1 dB,每个放大器的有源硅面积为$ 256 mu {hbox {m}}乘以256 mu $ m。 0.18-μm互补金属氧化物半导体技术。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号