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首页> 外文期刊>IEEE Transactions on Circuits and Systems. I, Regular Papers >A new design methodology for multiport SRAM cell
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A new design methodology for multiport SRAM cell

机译:多端口SRAM单元的新设计方法

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摘要

In this paper, we propose a new design methodology for multiport SRAM cell. A traditional static 6T CMOS cell is adapted to the multiport SRAM cell by adding several wordline transistors, thereby allowing asynchronous reads and writes during an operands access stage using the read feature of the 5T cell and the write feature of the 6T cell. The stability of the SRAM cell is affected by the factors of p-transistor, n-transistor and pass-transistor, not by the absolute dimensions of the three transistors. The optimal read access curve can be used to obtain the fastest access time in the secure range for the general multiport SRAM cell
机译:在本文中,我们提出了一种用于多端口SRAM单元的新设计方法。通过添加几个字线晶体管,传统的静态6T CMOS单元适用于多端口SRAM单元,从而允许使用5T单元的读取功能和6T单元的写入功能在操作数访问阶段进行异步读取和写入。 SRAM单元的稳定性受p晶体管,n晶体管和传输晶体管的因素的影响,而不是受三个晶体管的绝对尺寸的影响。最佳读取访问曲线可用于在常规多端口SRAM单元的安全范围内获得最快的访问时间

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