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Compact Modeling of a Magnetic Tunnel Junction Based on Spin Orbit Torque

机译：基于自旋轨道转矩的磁隧道结的紧凑建模

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摘要

High endurance, high speed, scalability, low voltage, and CMOS-compatibility are the ideal attributes of memories that any integrated circuit designer dreams about. Adding non-volatility to all these features makes the magnetic tunnel junctions (MTJs) an ultimate candidate to efficiently build a hybrid MTJ/CMOS technology. Two-terminal MTJs based on spin-transfer torque (STT) switching have been intensively investigated in literature with a variety of model proposals. Despite the attractive potential of the STT devices, the issue of the common writing/reading path decreases their reliability dramatically. A three-terminal MTJ based on the spin-orbit torque (SOT) approach represents a pioneering way to triumph over current two-terminal MTJs by separating the reading and the writing paths. In this paper, we introduce the first compact model, which describes the SOT-MTJ device based on recently fabricated samples. The model has been developed in Verilog-A language, implemented on Cadence Virtuoso platform and validated with Spectre simulator. For optimized simulation accuracy, many experimental parameters are included in this model. Simulations prove the capability of the model to be efficiently used to design hybrid MTJ/CMOS circuits. Innovative logic circuits based on the SOT-MTJ device, modeled in this paper, are already in progress.
机译：高耐用性，高速，可扩展性，低电压和CMOS兼容性是任何集成电路设计师梦about以求的存储器的理想属性。所有这些功能都增加了非易失性，从而使磁性隧道结（MTJ）成为有效构建MTJ / CMOS混合技术的最终候选人。基于自旋转移转矩（STT）切换的两端子MTJ已在文献中进行了广泛的研究，并提出了多种模型建议。尽管STT设备具有诱人的潜力，但常见的写入/读取路径问题极大地降低了其可靠性。基于自旋轨道转矩（SOT）方法的三端MTJ代表了一种通过分离读取和写入路径来胜过当前的两端MTJ的开创性方法。在本文中，我们介绍了第一个紧凑模型，该模型描述了基于最近制造的样品的SOT-MTJ器件。该模型已用Verilog-A语言开发，已在Cadence Virtuoso平台上实现，并已通过Spectre模拟器进行了验证。为了优化模拟精度，此模型中包含许多实验参数。仿真证明了该模型可有效用于设计混合MTJ / CMOS电路的能力。本文建模的基于SOT-MTJ器件的创新逻辑电路已经在开发中。

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