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A New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon Nanowires

机译:探索重掺杂多晶硅纳米线电性能的新方法

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摘要

In this study, we proposed a new methodology for probing the electrical properties of heavily doped polycrystalline silicon (poly-Si) nanowires (NWs), including active doping concentration, mobility, and interface fixed charge density. Implementation of this procedure is based on the modulation of the device operation of a gate-all-around (GAA) junctionless (J-less) transistor from the gated resistor mode to the ungated one. The extracted carrier concentration in the NW is found to be much lower than that of Hall measurements, while a negative fixed charge density is identified with the procedure. Dopant segregation at the oxide interface is postulated to be closely related to these observations.
机译:在这项研究中,我们提出了一种用于探测重掺杂多晶硅(poly-Si)纳米线(NWs)的电学特性的新方法,包括活性掺杂浓度,迁移率和界面固定电荷密度。此过程的实现基于对全栅极(GAA)无结(无J)晶体管从门控电阻器模式到非门控晶体管的器件操作的调制。发现在NW中提取的载流子浓度远低于Hall测量的载流子浓度,而通过该程序确定的负固定电荷密度。假定氧化物界面处的掺杂物偏析与这些观察结果密切相关。

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  • 来源
    《Japanese journal of applied physics》 |2013年第4issue2期|04CC18.1-04CC18.6|共6页
  • 作者单位

    Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan,National Nano Device Laboratories, Hsinchu 300, Taiwan;

    Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan;

    Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan;

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