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首页> 外文期刊>Journal of signal processing systems for signal, image, and video technology >Design of High-Speed Wide-Word Hybrid Parallel-Prefix/Carry-Select and Skip Adders
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Design of High-Speed Wide-Word Hybrid Parallel-Prefix/Carry-Select and Skip Adders

机译：高速宽词混合并行前缀/运载选择和跳过加法器的设计

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摘要

In this paper, hybrid parallel-prefix/carry select and skip adder (PPF/CSSA) schemes are proposed for high-speed wide-size adders. The proposed adders are based on an improved design of the parallel-prefix network and carry select (CSL) blocks. In this design, the delays of the two parts are balanced and matched. The proposed method cuts the carry chain in the CSL block and separates the block into two subblocks, in which the carry-in signals of the second sub-blocks are connected directly with the PPF signals to reduce the critical path. The proposed adders are evaluated at 45 nm technology and compared with previous designs. The proposed designs reduce the delay and power-delay product (PDP) by up to 29% and 33%, respectively, compared to previous designs.
机译：本文提出了一种用于高速宽尺寸加法器的并行并行前缀/进位选择和跳过加法器（PPF / CSSA）方案。提议的加法器基于并行前缀网络的改进设计，并带有选择（CSL）块。在这种设计中，两个部分的延迟是平衡且匹配的。所提出的方法将CSL块中的进位链切开并将该块分成两个子块，其中第二子块的进位信号直接与PPF信号连接以减少关键路径。建议的加法器在45 nm技术下进行了评估，并与以前的设计进行了比较。与以前的设计相比，拟议的设计分别将延迟和功率延迟乘积（PDP）分别降低了29％和33％。

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